Bit swapping linear feedback shift register (BS-LFSR) is employed in a conventional linear feedback shirt register (LFSR) to reduce its power dissipation and enhance its performance. In this paper, an enhanced BS-LFSR for low power application is proposed. To achieve low power dissipation, the proposed BS-LFSR introduced the stacking technique to reduce leakage current. In addition, three diffe...

Linear feedback sequence register (LFSR) is a useful cryptographic primitive which is widely implemented in many cryptosystems to represent finite field elements with the counterparts of minimal polynomials. In this paper, an efficient transitive signature scheme from LFSR (LFSR-TS) is considered. First, two derived LFSR sequence operations are designed for LFSR-TS, which are not proposed prior...

A new form of LFSR reseedingg that provides higher encodingg efficiency andd hence greater reductionn inn test dataa storage requirements is described. Previous forms of LFSR reseedingg have beenn static (i.e., test generationn is stoppedd andd the seedd is loadedd at one time) andd have requiredd full reseedingg (i.e., n=r bits are usedd for ann r-bit LFSR). The new form of LFSR reseedingg pro...

A test pattern generator (TPG) for built-in self-test (BIST), which can reduce switching activity during test application, is proposed. The proposed TPG, called dual-speed LFSR (DSLFSR), consists of two linear feedback shift registers (LFSRs), a slow LFSR and a normal-speed LFSR. The slow LFSR is driven by a slow clock whose speed is 1 th that of the normal clock, which drives the normal-speed ...

LFSR based PN number generating technique is used for various cryptography applications for designing with various encoder and decoder architecture. It is used for getting efficient result. Modern field programmable gate arrays (FPGAs) include the resources needed to design efficient LFSR structures. LFSR are used for implementation any logic functions for faster prototype development. It is ne...

Gershenfeld and Grinstein showed that a modulated linear-feedback shiftregister (LFSR) sequence can be synchronized by feeding the modulated sequence into an analog version of the LFSR. In this paper, a similar algorithm for synchronizing a LFSR sequence disturbed by additive white Gaussian noise is derived as forward-only message passing through the corresponding factor graph. Keywords—LFSR sy...

The project presents a test pattern compression method for circuits with a high number of parallel scan chains .It reduces test time while it keeps hardware overhead low. The decompression method is based on the continuous LFSR reseeding that is used in such a way that it enables LFSR lockout escaping within a small number of clock cycles. It requires a separate controlling of the LFSR de-compr...

LILI-128 is a clock controlled stream cipher based on two LFSRs with one clock control function and one non-linear filter function. The clocking of the second LFSR is controlled by the first LFSR. In this paper we propose a fault algebraic attack on LILI-128 stream cipher. We first recover the state bits of the first LFSR by injecting a single bit fault in the first LFSR. After that we recover ...