In this paper, the existing lumped circuit model for Through-Silicon-Via (TSV) structure embedded in Lightly-doped silicon substrate is reviewed and improved. A new lumped circuit model for TSV structure in heavily-doped silicon substrate is proposed. The underlying physics associated with the proposed lumped elements in the circuit topology is discussed and their values are found by data fitti...

Thermal performances of 3D IC integration system-in-package (SiP) with TSV (through silicon via) interposer/chip are investigated based on heat-transfer and CFD (computational fluid dynamic) analyses. Emphases are placed on the determination of (1) the equivalent thermal conductivity of interposers/chips with various copper-filled, aluminum-filled, and polymer w/o filler filled TSV diameters, p...

In order to embed more functionality and performance into the same design space, 3D IC integration technology is one of the routes towards further miniaturization of ICs and consequently, printed circuit boards. 3D TSV (through silicon via) stacking of wafers or dies requires die-to-die interconnections to conduct electricity and heat. Typically micro bump contacts with solder (e.g. AgSn) and C...

The propagation delay of a logic signal through a through silicon via (TSV) in a 3D IC may depend on a soft open defect inside it. The propagation delay of a defective TSV which is connected only with barrier metal, in part owing to a soft open defect, is analyzed with an electromagnetic simulator and a circuit one in this paper. The results reveal that if such a soft open defect occurs inside ...

Three-dimensional integrated circuits (3D ICs) introduce wafer bonding and Through Silicon Vias (TSVs) as new modules, thus extending manufacturing requirements beyond CMOS. A 3D IC with a photosensor is taken as an example to further analyze the resulting new metrology requirements for mass production. For the wafer bond module, data on defects before and after bonding, bond interface adhesion...

Article history: Received 8 November 2015 Received in revised form 1 March 2016 Accepted 4 March 2016 Available online 5 March 2016 Although thermal-aware Through Silicon Via (TSV) cluster's behavior has been studied extensively, the structure of TSV cluster,which is also critical for heat dissipation in ThreeDimensional IntegratedCircuit (3D IC), is ignored. In this paper, a novel structure of...

Three dimensional (3D) integrated circuits (ICs) have the potential to significantly enhance VLSI chip performance, functionality and device packing density. Interconnects delay and signal integrity issues are critical in chip design. In this paper, we extend the idea of redundant via insertion of conventional 2D ICs and propose an approach for vias insertion/placement in 3D ICs to minimize the...

3D IC packaging offers miniaturization, high performance, low power dissipation, high density and heterogeneous integration. Through-silicon via (TSV) and bonding technologies are the key technologies of 3D IC, and the corresponding reliability has to be well evaluated and qualified before real production applications. This paper reviews the emerging 3D interconnection technologies in worldwide...