There have been a number of approaches to high-level testability proposed over the recent years. The known methods have been implemented in test synthesis and in guiding gate-level test generation. However, works on application of testability measures to guide high-level test generation are missing. The main aim of this paper is to fill this gap. We propose a new method for calculating testabil...

This paper presents an area overhead and test time cooptimization method for SoCs based on consecutive testability. Consecutive testability of SoCs guarantees that we can handle any test sequence that requires consecutive application of test patterns at speed of system clock such as a test sequence for timing faults. The proposed method creates a test schedule and TAM using existing interconnec...

This paper discusses a numerically efficient approach to identify complex ambiguity groups for the purpose of analog fault diagnosis in low-testability circuits. The approach presented uses a numerically efficient QR factorization technique applied to the testability matrix. Various ambiguity groups are identified. This helps to find unique solution of fault diagnosis equations or identifies wh...

Current paper presents a unified approach for calculating mixed-level testability measures. In addition, a new method of testability guided RTL Automated Test Pattern Generation (ATPG) for sequential circuits is introduced. The methods and algorithms are based on path tracing procedures on decision diagrams. The previous known methods have been implemented in test synthesis and in guiding gate-...

Testability transformation is a new form of program transformation in which the goal is not to preserve the standard semantics of the program, but to preserve test sets that are adequate with respect to some chosen test adequacy criterion. The goal is to improve the testing process by transforming a program to one that is more amenable to testing while remaining within the same equivalence clas...