Transistor makes up the cornerstone of modern computing. In this work, a SPICE model GNRFET was used to simulate performance NMOS and CMOS binary full adder. The adder evaluated in terms its average power consumption propagation delay. Three variables, namely resistance value, dimer lines channel length were manipulated impact on assessed. It observed that linear improvement delay accompanied b...

With the continually increasing need for transmission of digital data over noisy channels, need for error control and correction techniques are also raising as well. There are various techniques and methods available for transmission of digital data over noisy channel but Viterbi Decoder is most efficient .It provides better coding gain at lower cost and good performance Convolutional encoding ...

This paper describes the design and implementation of a single-bit FIR Filter with balanced ternary coefficients (i.e. -1/0/+1) aimed at general DSP applications. The fixed filter coefficients were computed using a sigma delta modulation technique. The filter is based on a hierarchical adder structure that can be pipelined for high performance that has been designed and simulated in VHDL. The f...