Two major approaches for the digital design simulation can be classified into event-driven and levelized-code method. The drawback of event-driven simulation is low efficiency while the levelized-code simulation has problems in supporting asynchronous design. Since most digital designs are synchronous digital we implemented a levelizedcode simulator targeting synchronous digital design. Leveliz...

The physical layer is the lowest layer in the OSI network hierarchy. The services provided by this layer include digital-to-analogue conversion, modulation, demodulation, and analogue-to-digital conversion. From a vantage point higher up in the OSI hierarchy, the physical layer provides a virtual bit pipe for the transmission of information. Imperfections and perturbative noise in the channel, ...

In the next years, the well-known synchronous design style will not be able to keep pace with the increase of speed and capabilities of integration of advanced processes. Asynchronous design will become more and more common among digital designers, while synchronous-asynchronous interactions will emerge as a key issue in the future SoC designs. This paper will present test strategies for 2-phas...

We consider the four families of recognizable, synchronous, deterministic rational and rational subsets of a direct product of free monoids. They form a strict hierarchy and we investigate the following decision problem: given a relation in one of the family, does it belong to a smaller family? We settle the problem entirely when all monoids have a unique generator and fill some gaps in the gen...

Abstract. This paper describes a new technique for the demodulation of Sagnac fiber optic gyroscopes, based on the zero-crossing technique. The technique uses a digital approach with a quasi-synchronous clock, which allows for the implementation of very high resolution and low cost gyroscope demodulation circuits. The proposed demodulation circuit was tested in laboratory, using a emulated gyro...

The precision of phase-locked loop (PLL) has a direct effect on the output performance for three-phase grid-connected inverter or three-phase active PFC. In this paper, a new three-phase digital closed-loop phase-locked algorithm is proposed on the basis of synchronous reference frame transformation. Synchronous simulation of the PLL techniques is a good choice even if the polluted three-phase ...

This work introduces a novel methodology that eases the synchronous to asynchronous conversion of existing digital circuits. Synchronous singlephased circuits may have its performance improved with the use of a variable rate clock generator if the conversion is done on some key circuits. This methodology is used to improve the performance of a soft-core implementation ofthe Blowfish cryptograph...

In many engineering applications, the time coordination of geographically separated events is of fundamental importance, as in digital telecommunications and integrated digital circuits. Mutually connected (MC) networks are very good candidates for some new types of application, such as wireless sensor networks. This paper presents a study on the behavior of MC networks of digital phase-locked ...

Permanent Magnet Synchronous Motor (PMSM) variable-speed drive is widely used in the industry because of its particularly high mechanical power density, simplicity and cost effectiveness. Eliminating the mechanical sensor mounted on the shaft of the motors gives further improvement. These drives are referred to as “sensorless” electrical drives. In this paper a novel sensorless algorithm is pro...