We discuss the gap we experience in an industrial design path of high-speed packet switches. As bandwidth demand exceeds progress in CMOS technology, system architects are forced to abandon familiar design solutions and make fundamental changes to their architectures at an increasingly faster pace. We investigate design methods to decrease the risk of such changes and to provide a structured an...

This paper addresses the problem of path plannrng using a dynamic vehicle model. Previous works which include a basic kinematic model generate paths that are only realistic at very low speed. By considering higher vehicle speed during navigation, the vehicle can significantly deviate from the planned trajectory. Consequently, the planned path becomes unusable for the mission achievement. So, to...

Improvements in the processing speed of multipro cessors are outpacing improvements in the speed of disk hardware Parallel disk I O subsystems have been proposed as one way to close the gap between processor and disk speeds Such parallel disk systems require par allel le system software to avoid performance limiting bottlenecks We discuss cache management techniques that can be used in a parall...

Fast low power SRAMs are becoming the critical component of many VLSI chips. There is increasing divergence in the speed of the processors and the main memory, and the power dissipation is also increasing due to increase in the integration and the operating speed as well as increase in the battery powered devices. The SRAM helps in bridging the gap and also reducing the power dissipation [1]. A...

Speed limit policy, a monetary policy strategy that focuses on stabilizing inflation and the change in the output gap, consistently delivers better welfare outcomes than flexible inflation targeting or flexible price level targeting in empirical New Keynesian models when policymakers lack the ability to commit to future policies. Even if the policymaker can commit under an inflation targeting s...

While standard processors achieve supercomputer performance , a performance gap exists between the interconnect of MPP's and COTS. Standard solutions like Ethernet can not keep up with the demand for high speed communication of todays powerful CPU's. Hence, high speed interconnects have an important impact on a cluster's performance. While standard solutions for processing nodes exist, communic...

While standard processors achieve supercomputer performance, a performance gap exists between the interconnect of MPP's and COTS. Standard solutions like Ethernet can not keep up with the demand for high speed communication of todays powerful CPU's. Hence, high speed interconnects have an important impact on a cluster's performance. While standard solutions for processing nodes exist, communica...

While B+trees are the most popular index structure for disk databases, the T-Tree has been widely accepted as a promising index structure for main memory databases. For over two decades the speed of CPUs has increased faster than the speed of the main memory. Therefore, the speed gap of the CPU and memory has rapidly become steeper, and memory access has become the new bottleneck in databases. ...