نتایج جستجو برای: speed diagram
تعداد نتایج: 266714 فیلتر نتایج به سال:
SUMMARY The question we are concerned with here is the following : Let G be a torsion-free group and consider the free product Ghti of G with an innnite cyclic group (generator t). Let w be an element of Ghti?G and hhwii denote the normal closure of w in G hti, then is the natural homomorphism G ! G hti hhwii injective? Klyachko's paper : \Funny property of sphere and equations over groups" Kl]...
This paper succeeded in utilizing cellular automata (CA) model to simulate the process of the train operation under the four-aspect color light system and getting the nonperiodic diagram of the mixed passenger and freight tracks. Generally speaking, the concerned models could simulate well the situation of wagon in preventing trains from colliding when parking and restarting and of the real-tim...
System level signal integrity and power integrity problems for high speed serial links have been explored in this paper. An example of the USB 2.0 IP has been used in this paper, but the analysis is generic for all serial links. This paper considers signal and power integrity as effects simultaneoulsy. A model is developed to optimize the performance of high speed serial link in terms of jitter...
Abstract We have designed a high-speed SFQ bit-serial carry-save adder based on the binary decision diagram (BDD). A simple bit-serial carry-save adder based on the BDD we first designed has a carry-feedback loop. Its input data frequency is limited by the propagation delay in the feedback loop. In our second adder design, we have replaced one BDD gate with a nondestructive binary switch, by wh...
This paper analyzes the basic principle of S-curve acceleration and deceleration, and presents an implementation method of S-curve control algorithm based on FPGA. The S-curve function module diagram and implementing method of PWM speed adjusting are described in FPGA. The steps of S-curve speed dissociation module and PWM variable frequency speed control are shown in this paper. High Performan...
The effect of a moving defect particle for the one-dimensional partially asymmetric simple exclusion process on a ring is considered. The current of the ordinary particles, the speed of the defect particle, and the density profile of the ordinary particles are calculated exactly. The phase diagram for the correlation length is identified. As a by-product, the average and the variance of the par...
This paper examines several contributors to eye diagram degradation in high-speed digital systems. The eye diagrams are generated through a combination of full wave simulation and circuit analysis. The interconnect part of the analyzed structure is first characterized in terms of S parameters obtained with the finite difference time domain (FDTD) method. The resulting S parameters are used toge...
EEcient function representation is very important for speed and memory requirements of multiple-valued de-composers. This paper presents a new representation of multiple-valued relations (functions in particular), called Multiple-Valued Cube Diagram Bundles (MVCDB). MVCDBs improve on Rough Partition representation by labeling their blocks with variable values and by representing blocks eecientl...
A heterogeneous multi-valued decision diagram of encoded characteristic function for nonzero outputs (HMDD for ECFN) represents a multioutput logic function efficiently. As for the speed, the HMDD for ECFN machine is 3.02 times faster than the Core i5 processor, and is 12.50 times faster than the Nios II processor. As for the power-delay product, it is 32.72 times lower than the Core i5 process...
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