Abstract: Switched Current (SI) is a very interesting analog technique to perform interface circuits in mixed analog/digital systems because it is compatible with a low cost digital CMOS process (single poly technologies). The attempt of this work is to shed some light on the SI delta-sigma converter design method making use of an analog Hardware Description Language. To demonstrate the perform...

In this paper the design of a low power sigma-delta modulator with dynamic biasing is presented. This design uses simple analog and digital components to achieve the low power purpose. In order to get a 12-bit resolution over the 4-kHz signal bandwidth for voice band applications such as PCM CODECs, an optimum choice is the second order modulator with an oversampling ratio of 128 and sampling f...

In this paper, a reduced complexity third-order digital delta-sigma modulator for fractional-N frequency synthesis is presented. The modulator consists of two sub-blocks and has a single bit output which makes it best for this application. A good shaping of quantization noise is achieved using a new architecture for a digital third-order delta-sigma modulator. The hardware required for this mod...

Sigma delta modulators have been in widespread use for some time now. The relaxed analog component requirements of a sigma delta modulator (achieved through low bit counts and oversampling) make it a simple and elegant solution to the problem of analog to digital conversion. The disadvantage of conventional sigma delta modulators is that the sample rate must be many times higher than the highes...

In previous work [ 11, we have proposed an adaptive sigma delta modulator with improved dynamic range. The modulator adapts the step-size of the quantizer from estimates of the quantizer input. In this paper, we conduct a stability analysis of the new modulator.

Digital delta-sigma modulators (DDSMs) applied in fractional-N frequency synthesizers suffer from spurious tones which undermine the synthesizer’s spectral purity. We propose a solution featuring no hardware overhead while achieving equivalent spur elimination effect as using LFSR-dithering. This method can be implemented on MASH and single-loop DDSMs of 3rdand 2nd-order. key words: Digital del...

This paper presents a mixed equation-based and simulation-based design methodology for continuous-time Sigma-Delta modulators from high level specifications down to Layout. The calculation and scaling of the SigmaDelta coefficients as well as circuit sizing and layout generation are implemented in the same analog design environment CAIRO+. The design of a complete third order current-mode conti...

In this paper we propose a framework for stability analysis of EA modulators, and argue that limit cycles for constant inputs are natural objects to investigate in this context. We present a number of analytical and approximate techniques to aid the stability analysis of the double loop and interpolative modulators, and use these techniques to propose ways of improved design that explicitly tak...

This paper presents a reconfigurable sigma-delta audio Digital-to-Analog Converter (DAC) which is suitable for embedded FPGA applications. The Sigma-Delta Modulator (SDM) design can be configured as a 3rd or 5th order SDM and allows different input word lengths. Different input sampling rates are also entertained by employing a programmable interpolator. The DAC accepts 16-/18-/20-/24-bit PCM d...