Synchronous circuits must have a large clock margin to guarantee correct operations due to delay variations which become main issues in the Moore’s Law-based trend in VLSI chip development. Self-timed asynchronous circuit is a feasible solution to the timing-related problems while it suffers large energy dissipation due to signal transitions in all bits every cycle. The purpose of this study is...

The aim of built in self-test is to make the machine to test by itself. The best method among the built in self-test is pseudo exhaustive two pattern generation produces the output according to the input given with 16bit generator. The main drawback that occurs in this test pattern generation is maximum delay. It occurs in the carry generator module. In this paper, the method proposed with recu...