We propose a new delay test generation technique that can take into account the impact of the power supply noise on the signal propagation delays. This is di erent from existing delay fault models and test generation techniques that ignore the dependence of path delays on the applied test patterns and cannot capture the worst-case timing scenarios in deep submicron designs. In addition to sensi...

Power has become a burning issue in modern VLSI design. In modern integrated circuits, the power consumed by clocking gradually takes a dominant part. If a design is given, power consumption can be reduced by replacing some flip-flops with fewer multi-bit flip-flops. However, this procedure may affect the performance of the original circuit. Hence, the flipflop replacement without timing and pl...

In high resolution multispectral optical data, the spatial detail of the images are generally smaller than the dimensions of objects, and often the spectral signature of pixels is not directly representative of classes we are interested in. Thus, taking into account the relations between groups of pixels becomes increasingly important, making object­oriented approaches preferable. In this work ...

We introduce an algorithm for the efficient computation of the continuous Haar transform of 2D patterns that can be described by polygons. These patterns are ubiquitous in VLSI processes where they are used to describe design and mask layouts. There, speed is of paramount importance due to the magnitude of the problems to be solved and hence very fast algorithms are needed. We show that by tech...

A relaxation system for the incompressible and compressible Euler and Navier-Stokes equations is considered. A numerical scheme working uniformly in the above limits is constructed using higher-order nonoscillatory upwind discretiaations and higher-order implicit-explicit t ime discretization. Numerical results are presented for several test cases. @ 2003 Elsevier Ltd. All rights reserved. Keyw...

For submicron integrated circuits, 3D numerical techniques are required to accurately compute the values of the interconnect capacitances. In this paper, we describe an hierarchical capacitance extraction method that efficiently extracts 3D interconnect capacitances of large regular layout structures such as RAMs and array multipliers. The method is based on a 3D capacitance extraction method t...

background traumatic brain injury (tbi) is an important public health problem throughout the world. objectives the aim of this study was to assess repeated glasgow coma scale (gcs) scores in predicting the severity of tbi and patients’ survival. patients and methods in this longitudinal study used a total sample of 239 patients, all of whom were hospitalized with traumatic brain injuries. subje...