Technological advances have made FPGAs an attractive platform for the acceleration of complex scientific applications. These applications demand high performance and highprecision floating point arithmetic. In this paper, we present a design for calculating the Lennard-Jones potential and force as is done in molecular dynamics simulations. This architecture employs IEEE 754 double precision flo...

We present low cost FPGA floating-point arithmetic circuits for all the common operations, i.e. addition/subtraction, multiplication, division and square root. Such circuits can be extremely useful in the FPGA implementation of complex systems that benefit from the reprogrammability and parallelism of the FPGA device but also require a general purpose arithmetic unit. While previous work has co...

In an earlier paper, an approximate SVD updating scheme has been derived as an interlacing of a QR updating on the one hand and a Jacobi-type SVD procedure on the other hand, possibly supplemented with a certain re-orthogonalization scheme. In this paper, this updating algorithm is mapped onto a systolic array with O(n 2 ) parallelism for O(n 2 ) complexity, resulting in an O(n 0 ) throughput. ...