The analytical modeling of nanoscale Double-Gate MOSFETs (DG) requires generally several necessary simplifying assumptions to lead to compact expressions of current-voltage characteristics for nanoscale CMOS circuits design. Further, progress in the development, design and optimization of nanoscale devices necessarily require new theory and modeling tools in order to improve the accuracy and th...

A 1.2 kV SiC MOSFET with an integrated heterojunction diode and p-shield region (IHP-MOSFET) was proposed compared to a conventional (C-MOSFET) using numerical TCAD simulation. Due the (HJD) located at mesa region, reverse recovery time charge of IHP-MOSFET decreased by 62.5% 85.7%, respectively. In addition, high breakdown voltage (BV) low maximum oxide electric field (EMOX) could be achieved ...

In this paper, we explore the quantitative investigation of the high-frequency performance of Gate Electrode Workfunction Engineered (GEWE) Silicon Nanowire (SiNW) MOSFET and compared with Silicon Nanowire MOSFET(SiNW MOSFET) using device simulators: ATLAS and DEVEDIT 3D. Simulation results demonstrate the improved RF performance exhibited by GEWE-SiNW MOSFET over SiNW MOSFET in terms of transc...

In the paper boost converter characteristics at the steady state obtained from SPICE analysis with the use of selected kinds of MOSFET models of various complexity and accuracy are compared. The dependencies of the converter output voltage, the watt-hour efficiency and the MOSFET inner temperature on the frequency and the duty cycle of the MOSFET control signal as well as the converter load res...

The DRAM cells consist of one or several MOSFET devices and the subthreshold leakage current through the MOSFET strongly depends on the temperature variation. Therefore, it is obvious that the leakage of a memory cell is highly related to temperature variation. The temperature of the circuit can be measured indirectly by using leakage sensors which can be applied to various VLSI circuits becaus...

scaling challenges and limitations of conventional silicon transistors have led the designers to apply novel nano-technologies. one of the most promising and possible nano-technologies is cnt (carbon nanotube) based transistors. cnfet have emerged as the more practicable and promising alternative device compared to the other nanotechnologies.  this technology has higher efficiency compared to t...

The physical dimensions of bulk MOSFETs have been aggressively scaled down and these conventional devices will soon be experiencing limited improvements due to the scaling down. In order to continue performance improvements, new device architectures are needed. As the scaling of MOSFET into sub-100nm regime, SOI and DG-MOSFET are expect to replace traditional bulk MOSFET. These novel MOSFET dev...

The switching waveforms of a series of power MOSFET devices called Logic Level FETs (L2FETs) and featuring a 5V gate drive are presented and contrasted with those of the more conventional 10V gate drive devices. A new method of characterizing MOSFET switching performance is discussed in which the MOSFET is treated as a vertical JFET driven in cascade from a low voltage lateral MOS. The 2:1 adva...

A low-side switch is a MOSFET or an IGBT that is connected to the ground-referenced and is not floating. In a boost converter, the source terminal of the MOSFET is connected to the circuit ground, which is referred to a low-side MOSFET. To switch an N-channel MOSFET of a boost converter on, the V should be in the order of 10 to 20V. Since the source terminal is grounded, this implies that the g...