GMount is a file sharing utility built by using GXP and SSHFS-MUX for the wide-area Grid environments. By GMount, non-privilege users are able to build their own ad-hoc distributed file systems in seconds. The file lookup in GMount can be efficient in terms of communication cost if the network topology is given. In this paper, we present the design and implementation of GMount, as well as its e...

Give a transistor-level circuit schematic and sketch a stick diagram for a Problem 11 Assume a CMOS inverter designed in the ON 0.5u CMOS process drives. Complementary MOSFET (CMOS) technology is widely used today to form circuits in numerous The circuit diagram of the CMOS inverter is shown in figure (4). 2.2 Charging and Discharging in CMOS Inverter...... 16. 2.3 Energy Recovery 5.31 Circuit ...

A new binding model which can formulate any architectures is presented in this paper. Several simple algorithms which employ this model are proposed to demonstrate the performance on this model. Experimental results show that these algorithms though are simple yet can obtain better results than previous complex algorithms. In addition, exchanging sources of functional units and sharing function...

Quantum-dot Cellular Automata (QCA) technology is attractive due to its low power consumption, fast speed and small dimension; therefore it is a promising alternative to CMOS technology. Additionally, multiplexer is a useful part in many important circuits. In this paper we propose a novel design of 2:1 MUX in QCA. Moreover, a 4:1 multiplexer, an XOR gate and a latch are proposed based on our 2...

| This paper describes a VLSI architecture which can be recon gured to support both Full Search Block{Matching algorithm and 3{step Hierarchical Search Block{Matching algorithm. By using a recon gurable register{ mux array and a parameterizable adder tree, the 2{D array architecture provides e cient real time motion estimation for many video applications. We also propose a memory architecture a...

This paper proposes Built-In Self-Repair Analyzer (BISR) strategy with Redundancy which is an effective yieldenhancement strategy for embedded memories. It consists of a Built-In Self-Test (BIST) module, a Built-In Address-Analysis (BIAA) module and a Multiplexer (MUX) module. The BISR is designed flexible so that it can provide four operation modes to SRAM users. The feature of the proposed BI...

Fall 2004: Assignment No. 1 Due Date: 10.6.04 September 29, 2004 This assignment requires extensive use of the tlv verifier. Please refer to the tlv web page http://www.cs.nyu.edu/acsys/tlv for obtaining the executable images of the system. Use the 4.18 version, and follow the instructions for installing tlv on your machine. In addition you may refer to the smv manual, which is available in the...

Hardware multiplier is a critical element in many computing intensive sub-systems that are implemented in Field Programmable Gate Arrays (FPGAs). In this study, performance comparison between several different types of array-based unsigned 8-bit multipliers (both combinational and pipelined) for two types of FPGAs (XC4005XLPC84-3C and XC3S1000FT256-4C Spartan 3) in terms of resource utilization...