Intel PRO/10GbE LR adapter is the first commercially available 10 Gigabit Ethernet adapter for PC. In this report we describe our observations about the adapter functionality and performance, with respect to the possibility of the use for 10 Gigabit end-to-end communication over a wide-area network. 1 Obtaining adapters Intel PRO/10GbE LR is the first commercially available 10 Gigabit Ethernet ...

When running 16 CPU-intensive virtualized workloads, a server based on the 45nm Quad-Core Intel Xeon processor E5440 completed each workload by as much as 14 percent faster, using 29 percent less power, than a server based on the Quad-Core Intel Xeon processor X5355 (65nm). The 45nm processor was up to 43 percent faster and used up to 44 percent less power per workload than the Dual-Core Intel ...

Intel’s Software Guard Extensions (SGX) is a set of extensions to the Intel architecture that aims to provide integrity and confidentiality guarantees to securitysensitive computation performed on a computer where all the privileged software (kernel, hypervisor, etc) is potentially malicious. This paper analyzes Intel SGX, based on the 3 papers [14, 79, 139] that introduced it, on the Intel Sof...

Intel Optane memory offers non-volatility, byte addressability, and high capacity. It suits managed workloads that prefer large main heaps. We investigate as the for (Java) workloads, focusing on performance scalability. As workload (core count) increases, we note Optane’s relative to DRAM. A few incur a slight slowdown memory, which helps conserve limited DRAM Unfortunately, other scale poorly...

In this paper we will present a detailed study on tuning double-precision matrix-matrix multiplication (DGEMM) on the Intel Xeon E5-2680 CPU. We selected an optimal algorithm from the instruction set perspective as well software tools optimized for Intel Advance Vector Extensions (AVX). Our optimizations included the use of vector memory operations, and AVX instructions. Our proposed algorithm ...

Energy per Instruction (EPI) is a measure of the amount of energy expended by a microprocessor for each instruction that the microprocessor executes. In this paper, we present an overview of EPI, explain the factors that affect a microprocessor’s EPI, and derive a historical comparison of the trends in EPI over multiple generations of Intel microprocessors. We show that the recent Intel® Pentiu...

The Intel R © Itanium R © architecture contains a number of innovative compiler-controllable features designed to exploit instruction level parallelism. New code generation and optimization techniques are critical to the application of these features to improve processor performance. For instance, the Itanium R © architecture provides a compilercontrollable virtual register stack to reduce the ...

Submitted for the MAR05 Meeting of The American Physical Society High-resolution characterization of advanced interconnect and packaging architectures SHRIRAM RAMANATHAN, Components Research, Intel Corp., EVAN PICKETT, Intel, PATRICK MORROW, Intel, YONGMEI LIU, Intel, RAJEN DIAS, Intel — Characterization of buried interfaces in advanced interconnect and packaging structures is a critical challe...