Over the past few decades, several powerful placement algorithms have been used successfully in performing VLSI placement. With the increasing complexity of the VLSI chips, there is no clear dominant placement paradigm today. This work attempts to explore hybrid algorithms for large-scale VLSI placement. Our work aims to evaluate existing placement algorithms, estimate the ease of their reuse, ...

Speech encoding and encryption in VLSI, Published by ACM.Abstract In this paper, an image encryptiondecryption algorithm and its VLSI architecture are proposed. Fourier-Transform Based Speech Encryption.AbstractThis paper proposes a hardware-based speech. Public-key cryptography, the two keys are called the private key and. The VLSI implementation is.International journal of VLSI design Communi...

This paper presents a systematic methodology to develop statistical compact MOS models for advanced VLSI circuit simulation. Process variability in advanced CMOS technologies imposes a serious challenge for computer-aided VLSI circuit design. Therefore, statistical compact model has become indispensable for realistic assessment of the impact of random process variability on advanced VLSI circui...

A simple VLSI particle-induced yield predictor has been developed that allows us to predict the entire yield of VLSI and also to analyze the bottleneck processing steps and faults. Particles with spherical shape are generated in the production equipment for each VLSI processing step and are deposited on the wafer. The yield predictor accepts as inputs (a) layout description of the VLSI under an...

VLSI Cell Partitioning plays a substantial part in VLSI physical design. The task of designing integrated circuits is multifaceted, as modern circuits have a very huge number of modules. It is very much essential to split the circuit into a smaller and meeker logic blocks. In order to build a complex digital integrated circuit, the multi million transistors must be sub-divided into convenientnu...

We have developed a method of simplifying physical design for undergraduates enrolled in analog VLSI design. The analog CMOS course is a VLSI design course with laboratory that includes design, fabrication and testing of analog CMOS circuits. A student's design begins with a simple current mirror and ends with different types of sampling circuits such as switched-capacitor and autozero circuits...

Now-a-days there are many digital and analog circuits that are implemented by CMOS VLSI technology. Currently CMOS VLSI is progressing at fast rate and dominating most of the market. The low voltage VLSI circuits represent the electronic of the future. All electronics products are striving to reduce power consumption, to create more economical and efficient devices. For deep sub-micron CMOS tec...

This paper provide new low power solutions for Very Large Scale Integration (VLSI) designers. Especially, we focus on leakage power reduction. Although leakage power was negligible at 0.18μ technology and in nano scale technology, such as 0.07μ, leakage power is almost equal to dynamic power consumption. This paper presents heretofore unexplored methods for low-power VLSI design. In particular,...

A VLSI algorithm for solving a special block–five– diagonal system of linear algebraic equations will be presented. The algorithm is considered for the VLSI parallel computational model where both the time of the algorithm and the area of its design are components of the complexity estimations. The linear system arises from the finite– difference approximation of the first biharmonic boundary v...