This paper presents a new ultra-wideband LNA which employs the complementary derivative superposition method in noise cancellation structure. A pMOS transistor in weak inversion region is utilized for simultaneous secondand third-order distortion cancellation. Source-degeneration technique and two shunt inductors are added to improve the performance at high frequencies. The degeneration inducto...

this project aims to design and implement a new Cognitive Radio (CR) receiver targeting the IEEE 802.22 standard as the first world-wide CR standard. In fact, this project starts with a study and a comparison of various CR receivers. This study leads to the presentation of a new approach that was adopted based on sub-band sensing technique for a CR receiver. In addition, we demonstrate a system...

In this dissertation, two effective linearization schemes for radio-frequency receivers are introduced. The first of these comprises a mixed-signal feedforward path which regenerates third-order intermodulation (IM3) products at radio frequencies, downconverts these products, digitizes them, and then uses them to cancel corruptive IM3 products in the digital baseband portion of a nominally line...

This paper describes a combination of a Weaver mixer and an N-path filter for a superheterodyne receiver with a reconfigurable frequency plan. It uses an N-path topology driven with two different frequencies, effectively realizing a frequency shift together with band-pass filtering. To reduce transfers via harmonics other than the fundamental, a harmonic rejection scheme is used. A 28 nm FDSOI ...

This paper describes the implementation of the image rejection mixer block in the 5GHz frequency band using 0.18μm CMOS technology. The image rejection mixer block adopts the double-quadrature topology for high image-rejection ratio in the high frequency applications and is designed for the dual-conversion receiver. The loss of the polyphase filter in the signal path can be reduced with simple ...

This paper reports experimental results on a new class of single-chip multi-frequency channel-select filters based on self-coupled aluminum nitride (A1N) contour-mode piezoelectric resonators. For the first time, two-port AlN contour-mode resonators are connected in series and electrically coupled using their intrinsic capacitance to form multi-frequency (94 – 271 MHz), narrow bandwidth (~0.3%)...

A 2.4-GHz single-stage CMOS low noise amplifier (LNA) structure with ultra low power consumption is proposed. A current reuse technique is used to decrease power dissipation with increasing amplifier transconductance for the LNA. Thus, the same amplifier transconductance for the LNA will be achieved at decreased power dissipation. Also, due to the use of an inverter-type amplifier which has a s...

This paper presents the design and simulation of Low Noise Amplifier (LNA) in a 0.18μm CMOS technology. The LNA function is to amplify extremely low noise amplifier without adding noise and preserving required signal to noise ratio. Cadence design tool Spectre_RF is used to design and simulation based on resistors, inductors, capacitors and transistors. Power constrained methodology is used for...

A compact digitally-controlled single-stage variable gain amplifier (VGA) is introduced, which doubles the dB-linear range through the reconfiguration, saves power by 50% while maintaining the same linearity performance compared to those of the previous design. Implemented in 0.18 mm CMOS technology, the 5-bit digitally-controlled VGA achieves dB-linear gain range of 42 dB (221 to 21 dB) with g...

A VHF (30MHz-300MHz) band digitally programmable low noise amplifier (LNA) has been implemented with a 0.25um standard CMOS process for VHF CMMB mobile TV tuners. Utilizing a T-match input network, input matching of more than a decade bandwidth is achieved across all gain settings. Adopting the multiple gated technique, gain flatness enhancement and capacitor reuse etc., the proposed LNA demons...