Simulation is the most viable solution for the functional verification of SoC. The acceleration of simulation with multi-FPGA is a promising method to comply with the increasing complexity and large gate capacity of SoC. The most time-consuming factor of multi-FPGA simulation accelerator is signal transfer time between simulator and multi-FPGA system. This paper proposes a performance driven de...

This article described a complete design of parallel interface based on ARM & FPGA, using the on-chip DPRAM in FPGA to improve the metastability problem which was generated during data transmission between the asynchronous clock-domains ;And it achieved the design of ARM & FPGA hardware interface module , data-sending module , data-receiving module and FPGA driver module , also gave the feasibl...

In 2000, the first high speed SiGe FPGA utilizing Current Mode Logic (CML) was proposed. The excellent high speed performance that CML allows made it a good candidate for use in high speed FPGA design. However, the large power consumption associated with CML (108mW for the FPGA building block) made the design difficult to scale up. To alleviate this problem, an improved FPGA with shorter propag...

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We describe an FPGA-based datacenter network simulator to allow researchers to rapidly experiment with O(10, 000) node datacenter network architectures. We configure the FPGA hardware to implement abstract models of key datacenter building blocks including servers and all levels of switches. We discuss design and implementation issues of our FPGA models and show that it is practical to prototyp...

The paper deals with important topic of nowadays using FPGA in military applications. The FPGA are used in the defence industry instead of ASIC circuits for the same reason as in the civilian sector currently. The main advantages of the FPGA are presented in the paper. Base on these advantages we can define several military applications of the FPGA. The implementations of these applications are...

Two-dimensional field programmable gate arrays (2DFPGAs) have been hindered by performance degradation caused by the increase in wire area due to high integration. Studies of the 3D-FPGA are in progress to solve this problem [1]–[3]. A 3D-FPGA allows remarkable reduction of routing areas because of the shorter distance between basic blocks to be connected. It is noteworthy that performance degr...

Simulation is the most viable solution for the functional verification of SoC. The acceleration of simulation with multi-FPGA is a promising method to comply with the increasing complexity and large gate capacity of SoC. The most time-consuming factor of multi-FPGA simulation accelerator is synchronization time between simulator and multi-FPGA system. Time-multiplexing of interconnection wires ...

Abstract—This paper presents an architecture for a reconfigurable device which is specifically optimised for floating point applications. Fine-grained units are used for implementing control logic and bit-oriented operations, while parameterised and reconfigurable word-based coarse-grained units incorporating word-oriented lookup tables and floating point operations are used to implement datapa...

Field programmable gate arrays (FPGAs) provide an attractive solution to developers needing custom logic for short time-to-market products. Products embedding FPGA system-on-chip solutions have the advantage in that they can be updated once deployed. New FPGA firmware may be loaded via manufacturer-supplied memory devices or remotely via a network connection. Recent FPGAs allow for self-reconfi...