The human-pathogenic bacterium Salmonella enterica adjusts and adapts to different environments while attempting colonization. In the course of infection nutrient availabilities change drastically. New techniques, "-omics" data and subsequent integration by systems biology improve our understanding of these changes. We review changes in metabolism focusing on amino acid and carbohydrate metabol...

Reflecting a complex set of interactions with its host, Salmonella spp. require multiple genes for full virulence. Many of these genes are found in 'pathogenicity islands' in the chromosome. Salmonella typhimurium possesses at least five such pathogenicity islands (SPI), which confer specific virulence traits and may have been acquired by horizontal transfer from other organisms. We highlight r...

In this paper we consider implementation possibilities of an autopoietic information system for transparent, open and public political project management through a web interface as well as for further development of Internet democracy. We have developed proper documentation for such a system using the strategic planning of information systems (SPIS) framework. We show that it is possible to use...

The Cognitive–Experiential Self-Theory (CEST) proposes rationality and experientiality as independent personality constructs explaining how people process information. Recent empirical studies show that some have low scores on both of these dimensions (the so-called disengaged profile). Another model, Seeking Proxies for Internal States (SPIS), primarily proposed to explain obsessive-compulsive...

Assessment of spatiotemporal variations drought is an efficient method for implementing mitigation strategies and reducing its negative impacts. This study aimed to assess the pattern short- long-term droughts area with different climates. Therefore, 31 stations located in Iran were selected Standardized Precipitation Index (SPI) series timescales 3, 6, 12 months computed during 1951-2016 perio...

■ Core: ARM 32-bit CortexTM-M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access – Single-cycle multiplication and hardware division ■ Memories – 32 to 128 Kbytes of Flash memory – 6 to 20 Kbytes of SRAM ■ Clock, reset and supply management – 2.0 to 3.6 V application supply and I/Os – POR, PDR, and programmable voltage detector (PVD) – 4-to...