Sigma-delta modulator based digital-to-analog converters (DAC) have offered low-frequency designers a highly linear, high resolution data converter architecture that is highly amenable to integration with complex digital systems. Increasingly these data converters have been used to deliver all the power needed. In wireless applications, it is increasingly desirable to apply low-frequency sigma-...

This paper presents review on system level design of continuous time sigma delta modulator. A continuous time approach offers high accuracy with respect to discrete time modulator. Unity gain frequency and power can be achieved by continuous time design. as the sigma delta modulators are mainly implemented as discrete time circuits , a continuous time approach provides significant advantages fo...

Mats Høvin1, Alf Olsen2, Tor Sverre Lande1 and Chris Toumazou3 1Dept. of Informatics, University of Oslo, Blindern, N-0316 Oslo, Norway 2Schlumberger Geco-Prackla, Jongsåsveien 4, N-1300 Sandvika, Norway 3Dept. of Electrical & Electronic Engineering, Imperial College, Exhibition Road, London SW7 2BT, UK Abstract— This paper describes a new first and secondorder delta-sigma modulator (DSM) conce...

This paper discusses issues concerning the design of cascade sigma-delta modulators intended for multistandard wireless receivers. Four standards are covered: GSM, Bluetooth, UMTS, and WLAN. A top-down design methodology is proposed to find out the optimum modulator topology in terms of circuit complexity and reconfiguration parameters. Several reconfiguration strategies are adopted at both arc...

This work proposes a novel structure for adaptive sigma delta modulation that leads to considerable improvement in the dynamic range of the modulator. The quantizer step-size is adapted based on estimates of the input signal to the quantizer block rather than on estimates of the input signal to the modulator itself, as is common in current schemes. The proposed structure can be implemented rath...

Abstract This paper presents a design of a switched-capacitor discrete time 1st order Delta-Sigma modulator used for a resolution of 8 bits Sigma-Delta analog to digital converter. For lower power consumption, the use of operational transconductance amplifier is necessary in order to provide wide output voltage swing and moderate DC gain. Simulation results showed that with 0.35um CMOS technolo...

An adaptive delta-sigma modulator of 1st order with one-bit quantization is presented. Adaptation is instantaneous and based on an exponential law. The feedback signal is a multibit discrete-level signal generated by a digital-to-analog converter (DAC). Compared to a nonadaptive delta-sigma modulator of 1st order, the input dynamic range is significantly enhanced. The gain in dynamic range is 6...

A 0.6-V 34-μW delta–sigma modulator implemented by using a standard 0.13-μm complementary metal–oxide– semiconductor technology is presented. This brief analyzes a subthreshold-leakage current problem in switched-capacitor circuits and proposes subthreshold-leakage suppression switches to solve the problem. To verify the operation of the subthreshold-leakage suppression switches, two different ...

In this paper the spectral density of the additive jitter noise in continuous time (CT) Delta-Sigma modulators (DSM) is derived analytically. Making use of the analytic results, extracted in this paper, a novel method for elimination of the damaging effects of the clock jitter in continuous time Delta-Sigma modulators is proposed. In this method instead of the conventional waveforms used in the...