A two-dimensional analysis of punch-through effects in high voltage lateral DMOS transistors is presented. The behaviour of these devices has been investigated for various doping concentrations. For one doping profile punch-through occurs between 6V and 60V drain voltage depending on the gate voltage, for the other doping profile no parasitic channel is built up even at lOOV drain voltage. Furt...

This paper evaluates the performance of a multi-user MIMO detector for various channel models. An implementation of the COST 259 channel model is used in comparison to a simple stochastic tapped delay line model. The performance of the receiver using the various channel models is shown for varying number of users and varying antenna spacings. The receiver has no knowledge about the detailed aut...

In this paper previous works on calculating the output current of SBCNFET are reviewed and a new three capacitance model for estimating potential profile along the channel is proposed. Furthermore the transmission coefficient through the channel has studied and some new formulas considering the electron coherency in the channel are suggested. Electron coherency will results in resonant transmis...

In order to predict the variations of the channel ionic resistance with time, we follow the framework proposed by Taylor and Aris to analyze our results. We consider here a channel of radius R, length L, and the diffusion coefficient of the salt in the solution is D. Solving the Navier-Stokes equation for a cylindrical channel, under the assumption of no-slip boundary condition, the velocity pr...

The characteristics of the propagation in indoor environments at a carrier frequency of 24 GHz are investigated by means of wideband directional measurements. The data shows that indoor radio propagation is dominated by impinging waves that exhibit discrete character. Furthermore, a global characterization of the investigated radio environment suitable for stochastic channel modeling by means o...

A new SONOS flash memory device with recess channel and side-gate was proposed and designed in terms of recess depth, doping profile, and side-gate length for sub-40 nm flash memory technology. The key features of the devices were characterized through 3-dimensional device simulation. This cell structure can store 2 or more bits of data in a cell when it is applied to NOR flash memory. It was s...

In this paper we show that an a-Si:H thin film transistor TFT stressed with bias temperature stress BTS under both gate bias and drain bias produces a nonuniform threshold voltage profile which can be obtained from the quasi-Fermi potential profile and the threshold voltage Vt -shift data of BTS under the gate bias only. The transfer and output characteristics calculated with this nonuniform Vt...

For applications in high-density and high-speed optical interconnections, we propose to utilize polymer parallel optical waveguides (PPOWs) with so-called W-shaped refractive index profile in the core area. A W-shaped index profile is composed of a parabolic index distribution surrounded by a narrow index valley, followed by a cladding with a uniform refractive index. We expect that W-shaped in...