Second-order Generalized Integrator (SOGI)-based quadrature-signal-generator (QSG) together with either a phase-locked-loop (PLL) or frequency-locked-loop (FLL) constitute two types of typical synchronization units (i.e., SOGI-PLL and -FLL) that have been widely used in grid-tied converter systems. This article will reveal clarify the stability issue these arising from different implementations...

It tends to cause system oscillation when the inverter with a phase-locked loop based on proportional integral controller (PI-PLL) is connected weak grid. To improve suppression ability of grid-connected inverter, linear active disturbance rejection applied PLL (LADRC-PLL). Considering influence extended state observer, voltage outer-loop, current inner-loop, and frequency coupling, admittance ...

We report a novel oscillator for photonic RF systems. This oscillator is capable of generating high-frequency signals up to 70 GHz in both electrical and optical f domains and is a special voltage-controlled oscillator with an optical output port. It can be used to make a phase-locked loop (PLL) and perform all functions that a PLL is capable of for photonic systems. It can be synchronized to a...

A fully integrated phase-locked loop (PLL) fabricated in a 0.24μm, 2.5v digital CMOS technology is described. The PLL is intended for use in multi-gigabit-per-second clock recovery circuits in fiber-optic communication chips. This PLL first time achieved a very large locking range measured to be from 30MHz up to 2GHz in 0.24μm CMOS technologies. Also it has very low peak-to-peak jitter less tha...

Phase Locked Loops (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal.A phase locked loop can track input frequency or it can generate a frequency that is the multiple of input frequency .PLLs are widely employed in radio,tele communications,computers etc.In order to overcome the disadvantage of analog PLLs such as the effect of leak...

This paper presents a quantization noise cancellation technique for frequency-to-digital converter-based fractional-N phase-locked loops (FDC-PLLs). The technique cancels quantization noise prior to the loop filter so the PLL bandwidth can be increased without a significant phase noise penalty. The paper also presents an FDC-PLL architecture enhancement that achieves the effect of a charge pump...

This paper offers a detailed analysis as well tuning and discretization approach of the presented frequency-fixed dual second order generalized integrator based phase-locked loop (FFDSOGI-PLL) for three-phase power systems. The method combines different single- PLL approaches by ensuring high phase- frequency tracking properties. comparison with standard frequency-variable DSOGI-PLL three recen...

Phase-locked loop (PLL) frequency synthesizers used for high-speed data transmission must rapidly hop and lock to new frequencies. The fundamental problem is that the settling time depends inversely on the loop bandwidth, and increasing the bandwidth causes unwanted noise interference and stability problems for the circuit. We demonstrate the feasibility of replacing the analog integrator in th...

2 Digitizer 1GHz clock generation and control 5 2.1 Digitizer clock control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 Reference generation and coarse clock delay control . . . . . . . . . . . . . . . . . . . 6 2.3 Phase locked-loop (PLL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Digitizer clock fine delay control . . . . . . . . ...

Due to the important relationship between ultrasonic velocity and some properties of sample, the measurement of velocity of ultrasound is widely needed in various fields. In this paper, based on phase-locked loop technique, a new hybrid circuit is designed for ultrasonic velocity measurement and named as UV-PLL. In order to improve the stability of phase and achieve the ability of fast locking,...