This paper presents a new ultra-wideband LNA which employs the complementary derivative superposition method in noise cancellation structure. A pMOS transistor in weak inversion region is utilized for simultaneous secondand third-order distortion cancellation. Source-degeneration technique and two shunt inductors are added to improve the performance at high frequencies. The degeneration inducto...

In North America, cerambycid beetles can have significant ecological and economic effects on forest ecosystems, and the rate of introduction and/or detection of exotic species is increasing. Detection and survey programs rely on semiochemical-baited intercept traps which are often ineffective for large woodborers like cerambycid beetles. This study examined the effects of flight intercept trap ...

A novel large input range source-follower based bi-quad filter cell is proposed offering an additional degree of freedom to the position of the poles and zeros. Simulation results of a 4th order fully differential elliptical filter in a 0.13μm CMOS technology confirm a power consumption of 160μA @ 1.2V, an IIP3 of 6.3 dBm and a steepness of 177 db/decade.

A fully integrated CMOS wideband Low Noise Amplifier (LNA) operating over 2.3–7 GHz is designed and fabricated using a 0.18 μm CMOS process. The proposed structure is a common sourcecommon source (CS-CS) cascode amplifier with a coupling capacitor. It realizes both low voltage drop at load resistor (Rload) and high gain over 2.3–7 GHz with simultaneous noise and input matching and low power con...

Over the last few years, the automata-theoretic approach to realizability checking and synthesis of reactive modules, developed by Pnueli and Rosner, by Abadi, Lamport, and Wolper, and by Dill and Wong-Toi, has been quite successful, handling both the synchronous and the asynchronous cases. In this approach one transforms the specification into a tree automaton. The specification is realizable ...

This dissertation describes the design of a CMOS 900-MHz bandpass amplifier that is suitable for RF transceivers. The work employs the state-of-art inductive degeneration techniques to minimize the noise figure and explores the use of lossy spiral inductors in high frequency circuit to realize input matching networks on-chip. A Q-compensation circuit is included to achieve a 25-MHz 3-dB bandwid...

This paper deals with the design of low-power, highperformance, continuous-time filters. The proposed OTA architecture employs current-reuse differential difference amplifiers in order to produce more power efficient Gm-C filter solutions. To demonstrate this, a 6th order low-pass Butterworth filter was designed in 0.18 μm CMOS achieving a 65-MHz -3-dB frequency, an in-band input-referred third...

A cascode LNA was optimized for a GPS receiver radio frequency front end using a 0.18 μm CMOS technology. By careful choice of device geometry, gate and source degeneration inductors, a fully integrated LNA can be optimized to have a low noise figure, a high voltage gain and a wide dynamic range. The optimized LNA has a 1.512 dB noise figure, a –42.05 dB S11, a 20.04 dB voltage gain a –19.82 dB...

Built-in self-test (BiST) for transmitters is a desirable choice since it eliminates the reliance on expensive instrumentation to perform radio-frequency signal analysis. Existing on-chip resources, such as power or envelope detectors or small additional circuitry, can be used for BiST purposes. However, due to limited bandwidth, measurement of complex specifications, such as in-phase and quadr...