Low voltage non-linear computational circuits useful for analog VLSI signal processing applications based on floating gate MOS transistors (FGMOSFETs) are presented. The FGMOS transistors operate in the saturation region. The variable equivalent threshold voltage (VT) of the FGMOS transistor is exploited in such a way to transform it to a simple MOSFET of zero VT. A bias circuit using a convent...

While unmanned aerial systems can serve as a force multiplier for militants, these do not embody transformation in modern insurgent warfare or enable militants to engage regularly strategic coercion. Instead, drone use is consistent with militant group’s relative capabilities and broader objectives. Consequently, groups are likely employ drones primarily theater tactical military purposes.

The JPEG 2000 image compression standard is designed for a broad range of data compression applications. The Discrete Wavelet Transformation (DWT) is central to the signal analysis and is important in JPEG 2000 and is quite susceptible to computer-induced errors. However, advancements in Field Programmable Gate Arrays (FPGAs) provide a new vital option for the efficient implementation of DSP al...

let $g$ be a $p$-group of nilpotency class $k$ with finite exponent $exp(g)$ and let $m=lfloorlog_pk floor$. we show that $exp(m^{(c)}(g))$ divides $exp(g)p^{m(k-1)}$, for all $cgeq1$, where $m^{(c)}(g)$ denotes the c-nilpotent multiplier of $g$. this implies that $exp( m(g))$ divides $exp(g)$, for all finite $p$-groups of class at most $p-1$. moreover, we show that our result is an improvement...

This paper presents a high speed binary floating point multiplier based on Hybrid Method. To improve speed multiplication of mantissa is done using Hybrid method replacing existing multipliers like Carry Save Multiplier, Dadda Multiplier and Modified Booth Multiplier. Hybrid method is a combination of Dadda Multiplier and Modified Radix-8 Booth Multiplier. The design achieves high speed with ma...

In this paper we proposed a three stage pipelined finite-impulse response (FIR) filter, this FIR filter contains multipliers such as Hybrid multiplier, Booth multiplier algorithm and Array multiplier. In general, multiplication process consists of two parts as multiplicand and multiplier. According to the array multiplier, the numbers of partial products (PP) are equal to the number of bits in ...

Multipliers of reproducing kernel Hilbert spaces can be characterized in terms positivity $n \times n$ matrices analogous to the classical Pick matrix. We study for which it suffices consider bounded size $n$. connect this problem notion subhomogeneity non-selfadjoint operator algebras. Our main results show that multiplier algebras many analytic functions, such as Dirichlet space and Drury-Arv...

An efficient Lookup Table (LUT) design for memory-based multiplier is proposed.  This multiplier can be preferred in DSP computation where one of the inputs, which is filter coefficient to the multiplier, is fixed. In this design, all possible product terms of input multiplicand with the fixed coefficient are stored directly in memory. In contrast to an earlier proposition Odd Multiple Storage ...