the rapid scaling in modern cmos technology has motivated the researchers to design new analog-to-digital converter (adc) architectures that can properly work in lower supply voltage. an exchanging the data quantization procedure from the amplitude to the time domain, can be a promising alternative well adapt with the technology scaling. this paper is going to review the recent development in t...

We obtain a logical characterization of an important class of regular languages, denoted DO, and of its most important subclasses in terms of two-variable sentences with ordinary and modular quantifiers but in which all modular quantifiers lie outside the scope of ordinary quantifiers. The result stems from a new decomposition of the variety of monoids DO in terms of iterated block products. Th...

Crossbar architectures are one approach to molecular electronic circuits for memory and logic applications. However, currently feasible manufacturing technologies introduce numerous defects so insisting on defectfree crossbars would give unacceptably low yields. Instead, increasing the area of the crossbar provides enough redundancy to implement circuits in spite of the defects. We identify rel...

This paper deals with problems of logical level designing, modelling and simulations of digital, combinatorial circuits, which are based on the current mode gates – new digital elements operating with constant, continuous power supply current. For the modelling and simulation purpose some elements of standard Active – VHDL library IEEE1164 were changed. All designed circuits (one and four bits ...

We investigate the Belousov-Zhabotinzky (BZ) reaction as a substrate for computation. Expanding on previous research we present a new technique that utilizes two modes of the BZ reaction, excitation and oscillation, and selective diffusive coupling. We show in simulation that this technique can be used to invert input signals, providing the logical operator, NOT. Our system can readily compute ...

This paper tackles the VLSI circuit reverse engineering problem. Actual VLSI circuits are made of several millions of transistors or hundreds of thousands of logical gates. Whether it be for circuit verification, functional abstraction, or simply circuit understanding, reverse engineering aims at building a hierarchy from the transistor level, to gate level, to register level, up to more comple...

Slime mould has been proven to be a fruitful living substrate for implementing a wide range of computing circuits from computational geometry to collision-based logical circuits to robot control. It is apparent, however, that constructing working real-time universal processors from the slime mould is non-trivial task. We explore here similarities between development of slime mould protoplasmic ...

Most of the time the processing capability and efficiency of computers are compared to that of a human brain. This comparison lays the basic foundation for Artificial Neural Networks (ANN). In today’s technological age, neural networks are finding applications in almost every field. In this paper, an application of an ANN approach is presented to implement digital circuits. This approach provid...

We introduce a high-level synthesis methodology to automatically synthesize asynchronous circuits from a concurrent language called ALEPH. ALEPH is a high-level concurrent algorithmic specification that can model complex concurrent control flow, logical and arithmetic computation, and communication. This specification is translated into a Petri net which has actions. These actions are refined t...

The main result is the development, and delay comparison based on Logical Effort, of a number of high speed circuits for common arithmetic and related operations using threshold logic. The designs include 8 to 64-input AND, 4-bit carry generate, and the carry-out of a (7,3) parallel (population) counter. The circuits are designed using both domino gates and the recently proposed CMOS Charge Rec...