This paper describes a transistor sizing methodology for both analog and digital CMOS circuits. Various techniques are used for power optimization in CMOS VLSI circuits. Transistor sizing is one of the important techniques for the determination of circuit performance. The aim of the power optimization is to minimize the power and power-delay product or the energy consumption of the circuit. Thu...

W a) " NA sizing is one of the most widely used analytical methods in molecular _6 42 biology and biochemistry, and it is a core method for genomic analysis. Many research, • toE health care, and forensic applications rely on DNA sizing. Given the volume of DNA C: sizing done and the associated cost, an increasing need exists for extremely rapid, high. throughput, and inexpensive techniques. Es...

High-yield pulp (HYP) such as bleached chemi-thermo-mechanical pulp (BCTMP) from aspen wood, is now being used in the production of highquality fine papers, and this is particularly true in China. In this study, the effect of using cationic polymers such as poly-aluminum chloride (PAC), polyethylenimine (PEI), cationic polyacrylamide (CPAM), and poly(diallyldimethylammonium chloride) (PDADMAC) ...

BACKGROUND Ring sizing for mitral valve annuloplasty is conventionally done intraoperatively using specific 'sizer' instruments, which are placed onto the valve tissue. This approach is barely reproducible since different sizing strategies have been established among surgeons. The goal of this study is to virtually apply different sizing methods on the basis of pre-repair echocardiography to fi...

Two plant proteins, soyprotein and wheat gluten, and chicken feathers used to size cotton substrates provided sizing performance similar to starch and were also easily degraded in activated sludge. Sizing is an essential process to impart protection to warp yarns and increase weaving efficiency. Cotton yarns have traditionally been sized with starch, modified starch derivatives, CMC, poly vinyl...

We explore optimization methods for planning the placement, sizing and operations of Flexible Alternating Current Transmission System (FACTS) devices installed into the grid to relieve congestion created by load growth or fluctuations of intermittent renewable generation. We limit our selection of FACTS devices to those that can be represented by modification of the inductance of the transmissi...

This paper presents a detailed empirical study and analytical derivation of voltage wave-form and energy dissipation of global lines driven by CMOS drivers. It is shown that at high clock frequencies where the output voltage at the termination point of the transmission line L R C Optimizing the Energy-Delay-Ringing Product in On-Chip CMOS Line Drivers Payam Heydari Department of Electrical and ...

This thesis explores the design and analysis of Static Random Access Memories (SRAMs), focusing on optimizing delay and power. The SRAM access path is split into two portions: from address input to word line rise (the row decoder) and from word line rise to data output (the read data path). Techniques to optimize both of these paths are investigated. We determine the optimal decoder structure f...

To protect the environment and reduce carbon emissions, renewable power generation has been growing rapidly during past decade. Renewable energy resources are sometimes far away from main grid, leading to expensive grid-connection transmission lines. Deploying on-site storage can smooth output help spillage requirement of line capacity. This paper presents a method coordinately size for remote ...