We investigate the electronic transport through a single-level quantum-dot which is capacitively coupled to a charge-qubit. By employing the method of nonequilibrium Green's functions, we calculate the electric current through quantum dot at finite bias voltages. The Green's functions and self-energies of the system are calculated perturbatively and self-consistently to the second order of inte...

Abnormal increase of low frequency flicker noise in analog nMOSFETs with gate oxide in valence band tunneling domain is investigated. In 15Å oxide devices, valence-band electron tunneling from Si substrate to poly-gate occurs at a positive gate voltage and results in the splitting of electron and hole quasi Fermi-levels in the channel. The excess low frequency noise is attributed to electron an...

Novel low-voltage constant-impedance analog switch circuits are proposed. The switch element is a single MOSFET, and constantimpedance operation is obtained using simple circuits to adjust the gate and bulk voltages relative to the switched signal. Low-voltage (1-volt) operation is made feasible by employing a feedback loop. The gate oxide will not be subject to voltages exceeding the supply vo...

This paper, presents an idea for analog current comparison which compares input signal and reference currents with high speed and accuracy. Proposed circuit utilizes amplification properties of common gate configuration, where voltage variations of input current are amplified and a compared output voltage is developed. Cascaded inverter stages are used to generate final CMOS compatible output v...

Abstract: In this paper we present ultra low-voltage and high speed CMOS domino Carry gates. For supply voltages below 325mV the delay for the proposed ultra low-voltage Carry gates are approximately 5% relative to a complementary CMOS Carry gate. Furthermore, the Energy Delay Product is less than 1% relative to complementary CMOS Carry gate at the same supply voltage. Different domino Carry ga...

We report the characterization of defects in individual metallic single-walled carbon nanotubes by transport measurements and scanned gate microscopy. A sizable fraction of metallic nanotubes grown by chemical vapor deposition exhibits strongly gate voltage-dependent resistance at room temperature. Scanned gate measurements reveal that this behavior originates from resonant electron scattering ...

This paper presents a new approach using simultaneous voltage-scaling and gate-sizing for low power without violating the timing constraints. We provide the problem formulation in this application, and propose algorithms for single voltagescaling, single gate-sizing, and their simultaneous manipulation. We target a globally optimal solution by showing how the power optimization is related to th...

Low frequency noise characteristics of gate and drain currents are investigated for prestressed and poststressed AlGaN/GaN high electron mobility transistors. High reverse bias voltage stresses on the gate stack changes both drain and gate current noise. A temporary increase in drain current noise was observed during stress which recovered to prestress level a few weeks later. This is explained...

In low-voltage and low-power applications, optimization of several devices for speed and power is a significant issue. These issues can be overcome by incorporating Modified Gate Diffusion Input (Mod-GDI) technique. This technique has been adopted from Gate Diffusion Input (GDI). The Mod-GDI technique allows reducing power consumption, delay and area of digital circuits, while maintaining low c...

In this paper, we extract the mobility of ultra-thin, body buried oxide and fully depleted silicon-on-insulator MOSFET, for different front and back-gate configurations. The mobility values are found by using the Capacitance Gate Voltage and Current Gate Voltage characteristics. In addition, the maximum electron mobility is calculated for both configurations: SiON/Si (front-gate) and SiO2/Si (b...