Photonics is the platform of choice to build a modular, easy-to-network quantum computer operating at room temperature. However, no concrete architecture has been presented so far that exploits both advantages qubits encoded into states light and modern tools for their generation. Here we propose such design scalable fault-tolerant photonic informed by latest developments in theory technology. ...

System reliability is an important issue in designing modern multiprocessor systems. This paper proposes a fault-tolerant, scalable, system architecture that adopts pipeline scheme. To verify the performance of proposed system, SimEvent/Stateflow tool MATLAB program was used to simulate system. The uses twelve processors (P), connected linear array, build ten-stage with two backup (BP). However...

Multi-computers connected in various architectures are now commercially available and are being used for a variety of applications. Some of the most commonly used architectures are the binary hypercube, the binary tree, cube-connected cycles, the mesh, and multistage interconnection networks. All of these architectures have the major drawback that a single processor or edge failure may render t...

In earlier work we have proposed the concept of the dynamic group maximum matching for grouping the system graph into groups of different sizes according to the tasks arriving at the system. Also, we have developed a more efficient integrated fault-tolerant technique for ultra-reliable execution of tasks where both hardware (processors and communication channels) and software failures, and on-l...

Many proposed packet switching systems for high-speed networks have employed the Batcher-Banyan fabric due to its modular structure, self-routing functionality, and distributed con ict-resolving mechanism. In this paper, we present a systematic fault-tolerant design for the Batcher-Banyan class switches. Our rst concern is the development of an on-line error detection mechanism which is the pre...

This paper presents fault tolerant control systems FTC in a hybrid system framework. Due to the discrete nature of fault occurrence and reconfiguration, FTC systems are considered hybrid in nature. Thus, in this work, actuator fault recoverability is studied by utilizing a controllability concept of hybrid systems. The hybrid formalism allows the recoverability’s analysis based on the controlla...

We present a peer logging system for reducing performance overhead in fault-tolerant distributed shared memory systems. Our system provides fault-tolerant shared memory using individual checkpointing and rollback. Peer logging logs DSM modification messages to remote nodes instead of to local disks. We present results for implementations of our fault-tolerant technique using simulations of both...

Course: ECE 257A – Fault-Tolerant Computing, University of California, Santa Barbara, Fall 2006, Enrollment Code 49585 Catalog entry: 257A. Fault-Tolerant Computing. (4) PARHAMI. Prerequisite: ECE 154. Lecture, 4 hours. Basic concepts of dependable computing. Reliability of nonredundant and redundant systems. Dealing with circuit-level defects. Logic-level fault testing and tolerance. Error det...

This paper analyses the previous work done in the field of fault tolerant localization and tracking in wireless sensor network (WSN) using binary data. Many previous systems use only binary data for communication in the WSN in the area of fault tolerant localization and tracking. Fault tolerance is the property of wireless sensor nodes to accept the particular amount of fault in localization an...

This paper presents a method of estimating the availability of fault-tolerant computer systems with several recovery procedures. A segregated failures model has been proposed recently for this purpose. This paper provides further analysis and extension of this model. The segregated failures model is compared with a Markov chain model and is extended for the situation when the coverage factor is...