With the improvement of System-on-Chip integration, chip requires an increasingly large amount test data. To solve contradiction between storage capacity and bandwidth automatic equipment (ATE), a new method data compression/decompression is proposed based on annular scan chain. Corresponding fault bits different patterns are incompatible, moving in chain, makes all corresponding be compatible ...

This paper presents a decompression pipeline capable of accelerating out-of-core volume rendering of time-varying scalar data. Our pipeline is based on a twostage compression method that cooperatively uses the CPU and GPU (graphics processing unit) to transfer compressed data entirely from the storage device to the video memory. This method combines two different compression algorithms, namely ...

of Thesis Presented to the Graduate School of the University of Florida in Partial Fulfillment of the Requirements for the Degree of Master of Science DECODING-AWARE COMPRESSION TECHNIQUES FOR RECONFIGURABLE SYSTEMS By Chetan Murthy December 2008 Chair: Prabhat Kumar Mishra Major: Computer Engineering In recent years FPGA are widely used in reconfigurable systems. FPGA are configured using bits...