......We are pleased to introduce this special issue of IEEE Micro, featuring articles representing the leading-edge activities in high-performance interconnection networks presented at the 2008 IEEE Symposium on High-Performance Interconnects at Stanford University. The Hot Interconnects symposium is an international forum for academic and industry researchers to describe the latest cutting-ed...

To satisfy the demand for inter chip interconnects bandwidth, current research projects are based on use of wave guided optical interconnects. The circuit is implemented to compensate high external capacitive loads. A maximum of 12 channels LASER diode each 10 GB/s is designed to reduce power consumption. The layout area, adjustable modulation current and bias current are achieved. Design can b...

Testing of interconnects on a printed circuit board has been studied and the procedure has been standardized in the IEEE 1149.1 (JTAG) standard. The Sysem-on-Chip (SOC) technology allows us to integrate on the same chip, most of the electronics on a PCB. However, since an SOC operates at a much higher speed and has a very large packaging density, testing its interconnects is different. For exam...

We show the existence of direct photonic transitions between modes of a silicon optical microcavity spaced apart in wavelength by over 8 nm. This is achieved by using ultrafast tuning of the refractive index of the cavity over a time interval that is comparable to the inverse of the frequency separation of modes. The demonstrated frequency mixing effect, i.e., the transitions between the modes,...

This paper presents the first chip-scale demonstration of an intra-chip free-space optical interconnect (FSOI) we recently proposed. This interconnect system provides point-to-point free-space optical links between any two communication nodes, and hence constructs an all-to-all intra-chip communication fabric, which can be extended for inter-chip communications as well. Unlike electrical and ot...

Generalized multiprotocol label switching (GMPLS) with wavelength division multiplexing (WDM) technology is a very promising protocol technology for future optical networks. GMPLS technology interconnects new and legacy networks by automating connection provisioning and traffic engineering. The present electrical interconnects for the system on chip (SoC) are unable to satisfy the multiple desi...

Multi-socket server boards have emerged to increase the processing power density on the board level and further flatten the data center networks beyond leaf-spine architectures. Scaling however the number of processors per board puts current electronic technologies into challenge, as it requires high bandwidth interconnects and high throughput switches with increased number of ports that are cu...

A nonobtrusive technique for measuring misalignment errors in multistage free-space optical interconnects is proposed. The technique makes use of dedicated microoptics to relay higher order dedicated alignment beams generated by an optical power supply onto alignment detectors located on the periphery of a smart pixel chip. An implementation of this technique for measuring lateral (x–y) misalig...

Electro-optic polymers have unique photonic, electro-optic and mechanical properties that make them attractive to use in a wide range of devices starting from ultra-high bandwidth light modulators for optical communications to miniature low power components for on-chip optical interconnects. The main building blocks of those devices are optical waveguides, that due to versatility of the polymer...

Technologies now exist for implementing dense surface-normal optical interconnections for silicon CMOS VLSI using hybrid integration techniques. The critical factors in determining the performance of the resulting photonic chip are the yield on the transceiver device arrays, the sensitivity and power dissipation of the receiver and transmitter circuits, and the total optical power budget availa...