In recent years there has been much pressure placed on system designers to verify their designs with computer simulations before committing to actual printed circuit board layouts and hardware. Simulating complex digital designs is extremely beneficial, and very often, the prototype phase can be eliminated entirely. The same is not true for most analog circuits. While simulation can give a grea...

Realization of a novel single-resistance-controlled oscillator, employing an active element and all grounded passive elements, is the purpose of this manuscript. With requirements for completing the design being only a single Voltage Differencing Current Conveyor and four grounded passive components, it is also a preferable choice for integrated circuit implementation. The designed circuit has ...

An electronic nose (E-Nose) is one of the applications for surface acoustic wave (SAW) sensors. In this paper, we present a low-noise complementary metal-oxide-semiconductor (CMOS) readout application-specific integrated circuit (ASIC) based on an SAW sensor array for achieving a miniature E-Nose. The center frequency of the SAW sensors was measured to be approximately 114 MHz. Because of inter...

An approach to integrated mixed-mode simulation is described in which the popular SPICE circuit simulator is extended to analyze digital circuits at the gate, functional or behavioral levels. The analogue-to-digital conversion is provided by (multilevel) parameterized “thresholders” which assign digital signals to subranges of voltages determined by a set of voltage thresholds. The digitalto-an...

Query Representation Query Planning &

A silicon neuron circuit that produces spiking and bursting firing patterns, with biologically plausible spike shape, is presented. The circuit mimics the behaviour of known classes of cortical neurons: regular spiking (RS), fast spiking (FS), chattering (CH) and intrinsic bursting (IB). The paper describes the operation of the circuit, provides simulation results, a simplified analytical model...

− This paper describes an analogue processing element (APE) suitable for high-density image sensor/processor array integrated circuits. The design tradeoffs between area, power consumption, speed and accuracy are discussed and the architecture of the APE is presented. The design follows a switched-current “analogue microprocessor” approach while the implementation of arithmetic operations is si...

In this paper we present a complete neuromorphic image processing system and we report the development of an integrated CMOS low-power circuit to test the feasibility of its different stages. The image system consists of different parallel-processing stages: phototransduction, non-linear filtering, oscillatory segmentation network and post-processing to extract fundamental characteristics. The ...