Communication in parallel computers requires a low latency router. Once a suitable routing algorithm is selected, an implementation must be designed. Issues such as whether the router should be input or output driven need to be considered. In this paper, we use simulations to compare input driven and output driven routing algorithms. Three algorithms, the Dally-Seitz oblivious router, the *-cha...

An even-wiring router for the BGA package is presented in this paper to interconnect each I/O pad of a chip to a corresponding ball distributed on the substrate area. The major phases for the router consist of layer assignment, topological routing, and physical routing. Using this router, we can generate an even distribution of planar and any-angle wires to improve manufacturing yield. We have ...

In this paper, we propose a 1-cycle high-performance 3D bufferless router with a 3-stage permutation network. The proposed router utilizes the 3-stage permutation network instead of the serialized switch allocator and 7× 7 crossbar to achieve the frequency of 1.25GHz in TSMC 65nm technology. Compared with the other two 3D bufferless routers, the proposed router occupies less area and consumes l...

In the conceptual sending algorithm in [ND] and in the optional extension in [ROUTERSEL], a next hop is chosen when no destination cache entry exists for an off-link destination or when communication through an existing router is failing. Normally, a router is selected the first time traffic is sent to a specific destination IP address. Subsequent traffic to the same destination address continu...

How to optimally allocate redundant routers for high availability (HA) networks is a crucial task. In this paper, a 5-tuple availability function A (N ,M, , , ) is proposed to determine the minimum required number of standby routers to meet the desired availability ( ) of an HA router, where N and M are the numbers of active routers and standby routers, respectively, and , , and are a single ro...

The function of a router is to switch arriving packets to their correct output destination. A router is built to achieve a specified capacity (the sum of the rates of its interfaces), and users expect a router to consistently achieve this capacity. However, no commercial high-speed router can guarantee today that it will achieve its full capacity for all arrival traffic patterns. This is becaus...

In this paper we investigate the noise and crosstalk characteristics of all optical router based on SMZ switch using a numerical model. Two effects, the relative intensity noise (RIN) and channel crosstalk (CXT) that degrade the bit error rate (BER) performance of the router are investigated. Numerical simulation results show that for BER of 10, the sensitivity of the receiver with all-optical ...

A rotor-router walk is a deterministic version of a random walk, in which the walker is routed to each of the neighbouring vertices in some fixed cyclic order. We consider here directed covers of graphs (called also periodic trees) and we study several quantities related to rotor-router walks on directed covers. The quantities under consideration are: order of the rotor-router group, order of t...

2 Studying the Internet Topology (Underlay) 6 2.1 AS-level Topology of the Internet . . . . . . . . . . . . . . . . . . 6 2.1.1 Data Sources for AS-level Topology . . . . . . . . . . . . 7 2.1.2 Characterization Methods for AS-level Topology . . . . . 10 2.1.3 Modeling the AS-level Topology . . . . . . . . . . . . . . 13 2.2 Router-level Topology of the Internet . . . . . . . . . . . . . . . . ...