نتایج جستجو برای: مولد lfsr
تعداد نتایج: 4832 فیلتر نتایج به سال:
[Pram90] A. Pramanick, S. Reddy, " On the design of path delay fault testable combinational circuits " , Proc. at time t. After the application of the next clock the contents of the even flip-flops of the LFSR are shifted into the odd ones (see Figure 10b) producing the second vector. The content of the first output is derived by XORing the outputs of some flip-flops including the last one. Not...
This work presents novel multipliers for Montgomery multiplication defined on binary fields GF(2). Different to state of the art Montgomery multipliers, this work uses a Linear Feedback Shift Register (LFSR) as the main building block. We studied different architectures for bit-serial and digit-serial Montgomery multipliers using the LFSR and the Montgomery factors x and xm−1. The proposed mult...
quantum-dot cellular automata (qca) are a promising nanotechnology to implement digital circuits at the nanoscale. devices based on qca have the advantages of faster speed, lower power consumption, and greatly reduced sizes. in this paper, we are presented the circuits, which generate random numbers in qca. random numbers have many uses in science, art, statistics, cryptography, gaming, gamblin...
We propose a novel distinguishing attack on the shrinking generator with known feedback polynomial for the generating LFSR. The attack can e.g. reliably distinguish a shrinking generator with a weight 4 polynomial of degree as large as 10000, using 2 output bits. As the feedback polynomial of an arbitrary LFSR is known to have a polynomial multiple of low weight, our distinguisher applies to ar...
This work presents novel multipliers for Montgomery multiplication defined on binary fields GF(2). Different to state of the art Montgomery multipliers, this work uses a Linear Feedback Shift Register (LFSR) as the main building block. We studied different architectures for bit-serial and digit-serial Montgomery multipliers using the LFSR and the Montgomery factors x and x. The proposed multipl...
We present a novel test-per-clock BIST method for combinational or full-scan circuits. Our task is to design a combinational circuit, namely the output decoder, transforming the pseudorandom LFSR code words into the required test patterns pre-generated by some ATPG tool. The process is based on finding the coverage of the ones in the test vectors and the subsequent generation of implicants that...
In this paper, new context of Chinese Remainder Theorem (CRT) based analysis of combinatorial sequence generators has been presented. CRT is exploited to establish fixed patterns in LFSR sequences and underlying cyclic structures of finite fields. New methodology of direct computations of DFT spectral points in higher finite fields from known DFT spectra points of smaller constituent fields is ...
The structure of test system based on application built-in self-test (BIST) circuitries has been proposed. The main idea is oriented on minimization of hardware overheads and dealt with automatization of BIST-circuitries generation. Test generator based on linear feedback shift register (LFSR) provides two types of testing pseudorandom and deterministic. The proposed modified Berlekamp–Massey a...
نمودار تعداد نتایج جستجو در هر سال
با کلیک روی نمودار نتایج را به سال انتشار فیلتر کنید