This paper presents a novel architecture of an asynchronous FPGA for handshake-component-based design. The handshake-component-based design is suitable for large-scale, complex asynchronous circuit because of its understandability. This paper proposes an area-efficient architecture of an FPGA that is suitable for handshakecomponent-based asynchronous circuit. Moreover, the FourPhase Dual-Rail e...

An AES algorithm is implemented on FPGA platform to improve the safety of data in transmission. AES algorithms can be implemented on FPGA in order to speed data processing and reduce time for key generating. We achieve higher performance by maintaining standard speed and reliability with low area and power. The 128 bit AES algorithm is implements on a FPGA using VHDL language with help of Xilin...

Conventional fault simulation techniques for FPGAs are very complicated and time consuming. The other alternative, FPGA fault emulation technique, is incomplete, and can be used only after the FPGA chip is manufactured. In this paper, we present efficient algorithms for computing the fault coverage of a given FPGA test configuration. The faults considered are opens and shorts in FPGA interconne...

The field programmable gate array (FPGA) technology provides programmable system-on-chip (PSoC) environments for designing modern digital ASIC controllers for specific applications. This paper presents a FPGA based speed control IC for three-phase induction motor drives. The sinusoidal PWM is realized on a single FPGA chip from Xilinx Inc. to provide controlling switching pulses for inverter bl...

It is well known that Field Programmable Gate Arrays (FPGAs) can be used to accelerate calculations that take too much time on a Central Processing Unit (CPU). Methodologies have been proposed to reconfigure the FPGA at run time, depending on the needs of the system. The CPU and FPGA generally communicate through message passing, letting the programmer decide exactly which data needs to be pass...

FPGAs (Field-Programmable Gate Arrays) have been widely used as coprocessors to boost the performance of data-intensive applications [1][2]. However, there are several challenges to further boost FPGA performance: the communication overhead between the host workstation and the FPGAs can be substantial; large-scale applications cannot fit in a single FPGA because of its limited capacity; mapping...

This paper presents an intellectual property (IP) protection authentication scheme for field programmable gate array (FPGA) with embedded watermark. The use of digital watermarks to provide ownership (watermarking) and recipient (fingerprinting) identification for IP has become widespread. However, it could not prevent the unauthorized reuses when a person resells the watermarked FPGA design wi...

This paper presents an application of LabVIEW graphical programming and FPGA technology in the area of sensor calibration. A water quality sensor calibrator based on compact reconfi gurable FPGA core that works under a real-time controller is described. The system provides automatic calibration of stand alone sensors such as turbidity, pH or conductivity using diff erent calibration solutions t...

Recent improvements of FPGA technology in its clock frequency, density and configuration cost enable to implement large-scale, complex circuit. In these days, many systems adopt FPGA so that the processor in FPGA will be required higher performance. This paper focuses on Simultaneous Multithreaded (SMT) architecture, one of multithreading technology that improves performance. We suggest impleme...