As the trend in requirements of electronic packaging is toward higher I/O, greater performance, higher density, and lighter weight, the use of area array packaging technology is expected to increase. The type of packaging, such as ball grid array (BGA), chip scale package (CSP), and Flip Chip, provides the ultimate in high I/O-density and count with superior electrical performance, and very sma...

Finite element modelling (FEM) has been widely used for the estimation of the lifetime of solder joints subjected to temperature cycling. Thanks to the expertise of decades, a significant number of companies, universities and research institutes were able to have a relatively accurate estimation of life time for SnPb solder. For the leadfree solder materials, first attempts for correlation mode...

Although many have predicted the demise of through-hole components, they are alive and well with tens of billions assembled each year. In many cases these components are assembled by wave soldering. However, in many mixed product technology (i.e. SMT and through-hole on the same board) products, it makes sense to consider assembling the through-hole components with the pin-in-paste (PIP) proces...

Experimental damage mechanics of flip chip solder joints under current stressing is studied using 20 test vehicle flip chip modules. Three different failure modes are observed. The dominant damage mechanism is caused by the combined effect of electromigration and thermomigration, where void nucleation and growth lead to the ultimate failure of the module. It is observed that thermomigration dri...

The effect of under-bump-metallization (UBM) on electromigration was investigated at temperatures ranging from 135C to 165C. The UBM structures were examined: 5-μm-Cu/3-μm-Ni and 5 μm Cu. Experimental results show that the solder joint with the Cu/Ni UBM has a longer electromigration lifetime than the solder joint with the Cu UBM. Three important parameters were analyzed to explain the differen...

Fatigue damage of solder joints is a serious reliability concern in electronic packaging. In this study, a flip chip package was modeled to investigate the effects of underfill material properties and BT substrate thickness on solder joint reliability. The CTE was found to have the main effect and matching CTE between underfill and solder joint is the most important consideration in the selecti...

Copper wires have been attracting much attention for Large Scale Integration (LSI) bonding because of their excellent mechanical and electrical properties, in addition to their low material cost. The ends of these wires are usually joined to pads or through-holes on a printed circuit board, and lead-free soldering is one of the popular bonding methods. Since the deformation resistance of solder...

In this paper an improved method has been presented to determine the solder joint shear strength of passive discrete surface mounted (SMD) chip components (like resistors and capacitors). To calculate the stress in a solder joint in the case of shear loading, the force applied should be measured and the amount of joined surface (wetted area of the component metallization) calculated. Using the ...

Gold embrittlement of solder joints has been written about for at least four decades [1 – 3]. Nevertheless, gold embrittlement related solder joint failures have been analyzed in this laboratory as recently as July 2009. Gold embrittlement can be avoided by careful solder joint design and knowledge of the causes of this condition. The purpose of this paper is to provide a detailed account of ma...

The interfacial reactions and joint reliabilities between Sn–9mass%Zn solder and an electroless nickel-immersion gold (ENIG) plated Cu substrate were investigated during reflow and isothermal aging at temperatures between 343 and 423K for aging times of up to 2400 h. After reflowing and aging, the intermetallic compound (IMC) formed at the interface was found to be AuZn3. No Ni-containing react...