Reconfiguration time overhead is a critical factor in determining the system performance of FPGA dynamically reconfigurable designs. To reduce the reconfiguration overhead, the most straightforward way is to increase the reconfiguration throughput, as many previous contributions did. In addition to shortening FPGA reconfiguration time, we introduce a new concept of Virtual ConFigurations (VCF) ...

In component-based software engineering, reconfiguration describes structural changes to the architecture of a component system. For stateful components, not only structural but also behavioural aspects have to be taken into account in reconfiguration. We present a procedure to conduct reconfiguration in systems of concurrent, stateful components that interferes as little as possible with uncha...

We present an on-line distributed reconfiguration algorithm for finding a new maximum matching incrementally after some nodes have failed. Our algorithm is deadlock-free and, with k failures, maintains at least M k matching pairs during the reconfiguration process, where M is the size of the original maximum matching. The algorithm tolerates failures that occur during reconfiguration. The worst...

The bodies of fish change shape over propulsive, behavioral, developmental, and evolutionary time scales, a general phenomenon that we call "reconfiguration". Undulatory, postural, and form-reconfiguration can be distinguished, studied independently, and examined in terms of mechanical interactions and evolutionary importance. Using a combination of live, swimming fishes and digital robotic fis...

We compare different algorithms for reconfigurable atomic storage in the data-centric model. We present the first experimental evaluation of two recently proposed algorithms for reconfiguration without consensus and compare them to established algorithms for reconfiguration both with and without consensus. Our evaluation reveals that the new algorithms offer a significant improvement in terms o...

Achieving fault-tolerance through incorporation of redundancy and reconfiguration is quite common. The distribution of faults can have several impacts on the effectiveness of any reconfiguration scheme; in fact, patterns of faults occurring at strategic locations may render an entire VLSI system unusable regardless of its component redundancy and its reconfiguration capabilities. Such fault pat...

Adaptivity is one of the most critical issues related to System-on-Chip (SoC) design. In order to be runtime adaptive, SoC have to take into account changes related to user preferences and environment at runtime. Dynamically reconfigurable SoC, such as those implemented on Field Programmable Gate Arrays (FPGAs), are a good solution for runtime adaptivity. Dynamic reconfiguration allows FPGAs to...

Dynamically reconfigurable hardware offers promising possibilities for flexible, computation intensive applications. With the technological advance of reconfigurable hardware came a rapid growth in the number of resources per chip requiring large amounts of data transfer per reconfiguration operation. Especially run-time reconfigurable applications, which make frequent use of reconfiguration, s...