This paper presents architecture design and FPGA implementation for W-CDMA transceiver system. Altera high-density, high-performance programmable logic devices (PLDs) combined with intellectual property (IP) functions and the Quartus II development software provide a complete solution for the wireless communications application. The paper describes how to implement a wideband code division mult...

Complex SoC devices, such as the Zynq® All Programmable SoC family from Xilinx®, are being chosen by designers for the next generation of smart and intelligent, embedded smart vision systems. SoCs offer new levels of processing acceleration that were not possible in older multi-chip architectures due to the abundant and tightly coupled connectivity of the ARM® Dual Cortex A9 processing system a...

Introduction Video and image processing applications are typically very computationally intensive. Given the increasing processing demands, the parallel processing capabilities of Altera® programmable logic devices make them an attractive implementation option for highly repetitive tasks found in video and imaging functions. Instead of using multiple programmable digital signal processors, a si...

Many teaching institutions worldwide have decided to work firmly in distance learning applications. In this frame, remote laboratories enable the intensive use of the university devices and ease the work of professors and students. The present work introduces different platforms to be used in industrial automation practises, developed in Barcelona, Manaus and Santiago de Cuba. The platforms are...

Most partitioning algorithms have been developed for conventional programmable logic (especially FPGAs), being their main goal the minimisation of the signals constituting the interface (cutsize) between partitions, while balancing partition sizes. New families of dynamic reconfigurable programmable logic (DRPL) offer new possibilities to improve functional density of circuits, but traditional ...

—For measurement systems, guaranteeing the accuracy is the primary task and optimizing resources has strong connection with low power consumption and low cost. There is a need for smooth filtering, median filtering and some other data processing in Complex Programmable Logic Device or Field-Programmable Gate Array design of measurement systems. And the weighted arithmetic is indispensable for ...

A multi-layer trigger system, based on programmable logic devices hosted VME boards, has been implemented. It is completely scalable and suitable for handling from a few up to hundred channels. Custom software monitoring controlling the system developed.

Industrial process control is an untapped market for field programmable gate arrays (FPGAs). Programs used for industrial process control are traditionally written in a graphical language called relay ladder logic, and implemented on programmable logic controllers (PLCs). The mapping of ladder logic onto typical FPGAs is a lengthy process, and results are hard to verib. We propose an FPGA archi...

We present results from the application of a new methodology based on Parallel and Distributed Genetic Programming (PADGP). It allows us to automatically perform the placement and routing of circuits on reconfigurable hardware. For each of the problems we have dealt with, the methodology finds several different solutions. 1 DESIGN BASED ON FPGAS Field Programmable gate arrays (FPGAs) are powerf...

Present industry practice has created a high demand for systems designers with knowledge and experience in using programmable logic in the form of CPLDs and FPGAs in addition to hardware description languages. Many universities offer this type of training in advanced digital engineering courses. This paper describes our experience in integrating VHDL and programmable logic devices based on Xili...