To model the active layer in the hetero-junction solar cells, the C60, C70, PC60BM, PCBDAN fullerenes as acceptor, and (OS)n=1) oligoselenophenes as donor were considered. The (OS)n=14/C60, (OS)n=14/C70, (OS)n=14/PC60BM, and (OS)n=14/PCBDAN blends as a model of the active layer in the BHJ solar cell were chosen, and the optoelectronic properties were studied. The calculated efficiency of these ...

Nanowires (NWs) are recently used in several sensor or actuator devices to improve their ordered characteristics. Silicon nanowire (Si NW) is one of the most attractive one-dimensional nanostructures semiconductors because of its unique electrical and optical properties. In this paper, silicon nanowire (Si NW), is synthesized and characterized for application in photovoltaic device. Si NWs are ...

2 A process to fabricate functional polysilicon structures above large (43 4 mm ) thin (200 nm), very flat LPCVD silicon rich nitride membranes was developed. Key features of this fabrication process are the use of low-stress LPCVD silicon nitride, sacrificial layer etching, and minimization of membrane stress and deformation after fabrication, which was done by complete removal of the sacrific...

Today, due to qualitative growth and scientific advances, energy, especially electricity is increasingly needed by human society. One of the almost endless and pure energy which have been paid attention over the years is the solar energy. Solar cells directly convert solar energy into electrical energy and are one of the main blocks of photovoltaic systems. Significant improvement has been made...

Solar cell is known as a sustainable and environment friendly source of energy in nature. It converts sunlight directly into electricity with zero emission and also without side-effects on the environment. But, solar cells have optical and mechanical defects which include the type of micro crack, the size of crack, and the noise from electrical or electromechanical interference during the image...

A novel on-chip electrostatic discharge (ESD) protection design by using polysilicon diodes as the ESD clamp devices in CMOS process is first proposed in this paper. Different process splits have been experimentally evaluated to find the suitable doping concentration for optimizing the polysilicon diodes for both on-chip ESD protection design and the application requirements of the smart-card I...

With the ultimate goal of creating autonomous microrobots, we have developed a new five-mask process that combines two polysilicon structural layers with 35 μm thick SOI structures and a backside substrate etch. The polysilicon layers provide 3D hinged structures, high compliance structures, and electrical wiring. The SOI structural layer yields much stronger structures and large-force actuator...