Integrating high performance and real-time demands on multi-processor systems is a challenging task. We present our concept of isolating processes from a general-purpose operating system without deeply invading modifications. This allows executing code on dedicated CPUs with minimum latency and jitter like bare-metal on micro-controllers. The unbounded execution of mixed critical processes on t...

In October of 1997, a year-long collaborative project was started between Hitachi Europe Limited (HEL) and the Edinburgh Parallel Computing Centre (EPCC) at the University of Edinburgh. This project had the goal of producing an environment whereby Java programs may be executed on the Hitachi SR2201 distributed memory multi-processor machine. The two key deliverables from this work are a port of...

Asynchronous pipelining is a form of parallelism in which processors execute diierent loop tasks, as opposed to diierent loop iterations. An asynchronous pipeline schedule for a loop is a generalization of a noniterative DAG schedule, and consists of a processor assignment|an assignment of loop tasks to processors; plus a task sequence for each processor|an order on instances of tasks assigned ...

Worst-case execution times (WCET) of tasks are essential for safe scheduling in hard real-time systems. However, contemporary processors exceed the capabilities of static worst-case timing analysis tools. The Virtual Simple Architecture (VISA) framework shifts the burden of bounding the WCET of tasks, in part, to hardware. A VISA is the pipeline timing specification of a hypothetical simple pro...

We consider the problem of scheduling a sequence of tasks in a multi-processor system with connicts. The term \connict" refers to a situation where two or more processors share common resources that can only be accessed by one processor at any given time. Connicting processors cannot process tasks at the same time. At certain times new tasks arrive in the system, where each task speciies the am...

In this paper, we propose an approach to obtaining enhanced performance of the Linpack benchmark on a GPU-accelerated PC cluster connected via relatively slow inter-node connections. For one node with a quad-core Intel Xeon W3520 processor and a NVIDIA Tesla C1060 GPU card, we implement a CPU–GPU parallel double-precision general matrix–matrix multiplication (dgemm) operation, and achieve a per...

In this paper, we propose a new packing strategy to find a free resource for run-time mapping of application tasks to NoC-based Heterogeneous MPSoC. The proposed strategy minimizes the task mapping time in addition to placing the communicating tasks close to each other. To evaluate our approach, a comparative study is carried out for a platform containing single task supported PEs. Experiments ...

A software and hardware system, called Kali, for programming and controlling cooperative manipulators is described. It has been designed at McGill University in a collaborative effort with the Jet Propulsion Laboratory. A set of programming primitives which permit a programmer, human or automated, to specify cooperative tasks are first outlined. In the context of cooperative robots, trajectory ...