نتایج جستجو برای: low power test
تعداد نتایج: 2290959 فیلتر نتایج به سال:
the current study examined iranian undergraduate efl students’ willingness to communicate with regard to their vocabulary knowledge. in general, participants were somewhat willing to communicate in english. the total mean score of 730 university students’ perception of willing to communicate was 83.53 out of 135. results, regarding four parts of willingness to communicate, revealed that part...
To find the proper solutions for test power reduction strategy for parallel core-based SoC, in this paper, starting from the terminology and models for power consumption during test, The efforts to reduce the power consumption during normal function mode further exaggerated the power consumption problem during test. The state of the art in low-power testing is presented, various power reduction...
This research article proposed a logic BIST using linear feedback shift register (LFSR) to generate low power test patterns; It reduced the number of transitions at the input of the circuit-under-test using bit swapping technique. The designed architecture is programmed using Verilog HDL and simulated using CADENCE EDA Tool of 180 nm technology and also proposed design gives better performance ...
Article history: Received 25 June 2014 Received in revised form 8 July 2014 Accepted 25 August July 2014 Available online 29 September 2014
Low Power consumption has become growing larger for communication systems and battery operated devices. These are laptop computers, multimedia products, and cell phones. For this battery operated devices, the energy consumption is a critical issue for design since it affect the batteries life. Thereby, the reduction of the energy consumption is become one of the most growing topics in the elect...
The objective of manufacturing test is to separate the faulty circuits from the good circuits after they have been manufactured. Three problems encompassed by this task will be mentioned here. First, the reduction of the power consumed during test. The behavior of the circuit during test is modified due to scan insertion and other testing techniques. Due to this, the power consumed during test ...
پیشرفت تکنولوژی و استفاده از تکنیک های مختلف جهت کوچک سازی مدارهای مجتمع منجر به طراحی مدارهای بسیار کوچکی جهت کاربردهای پزشکی شده است. همچنین از مدولاسیون های مختلفی جهت ارسال داده ها استفاده می شود. فرستنده گیرنده های زیادی به همین منظور طراحی شده است اما مهمترین چالش هایی که در این راه وجود دارد مصرف توان و نرخ خطای بیت (ber) مدارهای طراحی شده است. در این تحقیق یک فرستنده گیرنده کم مصرف با ...
In this paper, we present a new low power BIST test pattern generator that provides test vectors which can reduce the switching activity during test operation. The proposed low power/energy BIST technique is based on a modified clock scheme for the TPG and the clock tree feeding the TPG. Numerous advantages can be found in applying such a technique. The fault coverage and the test time are roug...
abstract study design: a cross-sectional non-experimental study. objectives: to collectively detect the reliability and feasibility of the five types of clinical tests that have been used to measure endurance of the trunk muscles in subjects with and without low back pain (lbp) and identify the sensitivity of each test to predict the probability of the occurrence oflbp. background: testing spin...
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