A low phase-noise wide tuning range VCO is a critical building block in high-performance serial interface circuits. A negativeresistance cell that has a small effective parasitic capacitance combined with high-quality LC tanks are crucial for high quality VCOs. There have been several efforts to reduce the parasitic capacitance of the basic Armstrong structure [1,2] to improve the VCO performan...

A low phase noise CMOS complementary cross-coupled LC-tank voltage-controlled oscillator (VCO), implemented with TSMC 0.18μm 1P6M CMOS technology, is presented. Double pair pseudoresistance transistors biased by the tapped center of the inductor are utilized to reduce the DC bias current. The circuit consumes 1.55 mA from a 1.5 V supply voltage which saves up to 52.4% power, compared with the c...

This paper describes a new approach to low phase noise LC VCO design based on transconductance linearization of the active devices. A prototype 25GHz VCO based on this approach is integrated in a dual loop PLL and achieves superior performance compared to the state of the art. The design is implemented in the 32nm SOI deep sub-micron CMOS technology and achieves a phase noise of −130dBc/Hz at 1...

With high bandwidth demand in the telecommunication and networking area, low voltage and low jitter Phase Lock Loop (PLL) is becoming of utmost importance. As the data rate becomes faster, the total jitter budget gets smaller. For instance, an OC-192 transceiver compliant is allowed less than 1ps of total jitter due to random noise (rms jitter) and a maximum of 10ps for the deterministic jitter...

<p>The voltage-controlled oscillator (VCO) is the primary device in phase-locked loop (PLL) to produce local frequency. The excessive phase noise of VCOs cause PLL performance loss. This paper proposes design and optimization low power consumption for a 180 nm N-channel metal-oxide semiconductor NMOS VCO applications with P-channel PMOS varactors spiral inductors. At 2 V supply voltage, o...

In this thesis, a procedure of designing a wideband, low phase noise VCO is proposed. The sequence is presented step by step, from the frequency planning to topology selection, component selection. By exploring the advantages and disadvantages of each VCO topology and each component, the most suitable topology and components are chosen for each application. A technique for extending the tuning ...

Title of dissertation: LOW PHASE NOISE CMOS PLL FREQUENCY SYNTHESIZER DESIGN AND ANALYSIS Xinhua He, Doctor of Philosophy, 2007 Dissertation directed by: Professor Robert Newcomb Department of Electrical and Computer Engineering The phase-locked loop (PLL) frequency synthesizer is a critical device of wireless transceivers. It works as a local oscillator (LO) for frequency translation and chann...

Based on a physical understanding of phase-noise mechanisms, a passive LC filter is found to lower the phase-noise factor in a differential oscillator to its fundamental minimum. Three fully integrated LC voltage-controlled oscillators (VCOs) serve as a proof of concept. Two 1.1-GHz VCOs achieve 153 dBc/Hz at 3 MHz offset, biased at 3.7 mA from 2.5 V. A 2.1-GHz VCO achieves 148 dBc/Hz at 15 MHz...