Interrupt coalescing is a well known and proven technique for reducing CPU utilization when processing high IO rates in network and storage controllers. Virtualization introduces a layer of virtual hardware for the guest operating system, whose interrupt rate can be controlled by the hypervisor. Unfortunately, existing techniques based on high-resolution timers are not practical for virtual dev...

The investigation of the foundational aspects of linguistic mechanisms for programming long running transactions (such as the scope operator of WS-BPEL) has recently renewed the interest in process algebraic operators that interrupt the execution of one process, replacing it with another one called the compensation. We investigate the expressive power of two of such operators, the interrupt ope...

[Yahel Ben-David:] I’ll presume the hardware used is the easier case of MIPS. The x86 architecture complicates things as some instructions may silently fail if not run under a real “ring-0” privileges. Before delving into the flow of control for handling a system-call (syscall) on a virtualized system, let’s briefly discuss what happens in a traditional setting (without virtualization): When th...

In this paper we describe a new, low-overhead technique for manipulating processor interrupt state in an operating system kernel. Both uniprocessor and multiprocessor operating systems protect against uniprocessor deadlock and data corruption by selectively enabling and disabling interrupts during critical sections. This happens frequently during latency-critical activities such as IPC, schedul...

We are building a tool that uses symbolic execution to search for BIOS security vulnerabilities including dangerous memory references (call outs) by SMM interrupt handlers in UEFI-compliant implementations of BIOS. Our tool currently applies only to interrupt handlers for SMM variables. Given a snapshot of SMRAM, the base address of SMRAM, and the address of the variable interrupt handler in SM...