Feedback control is widely used in chemical engineering to improve the performance and robustness of chemical processes. Feedback controllers require a 'subtractor' that is able to compute the error between the process output and the reference signal. In the case of embedded biomolecular control circuits, subtractors designed using standard chemical reaction network theory can only realise one-...

Power dissipation has become an overriding concern for VLSI circuits and it may come to dominate the total chip power consumption as the technology feature size shrinks. The main aim of this paper is to minimize the leakage power by using a ultra low leakage techniques. In this work we are choosing the Benchmark circuit as full subtractor . This full subtractor are designed by using different t...

-In this paper a 4 bit parallel adder/subtractor circuit has been designed and analyzed. The circuit uses a controlled adder/subtractor circuit which converts the negative numbers into their 2’s complement. A comparative study of the silicon area and the power consumption has been done in the circuit using different channel lengths such as 65nm, 45nm. The circuit is designed and simulated using...

AbstractIn today’s world everyday a new technology which is faster, smaller and more complex than its predecessor is being developed. The increased number of transistors packed onto a chip of a conventional system results in increased power consumption that is why Reversible logic has drawn attention of Researchers due to its less heat dissipating characteristics. Reversible logic can be impose...

In this paper, we propose an efficient design of a reversible single precision floating point multiplier based on compressor. The single precision floating point multiplier requires the design of an efficient 24x24 bit integer multiplier. In the proposed architecture, the 24x24 bit multiplication operation is fragmented to nine parallel reversible 8x8 bit multiplication modules. In this paper, ...

The feasibility of Quantum Computer with Super Computing capability is addressed here. We describe a Arithmetic Logic Unit for Quantum Computer and show how the algebra is modified if the information is kept in phase for Radix-4 operation. We formulate Quaternary adder, subtractor, multiplier and divider circuits using basic quantum gates.