Abstract model checking is a method to verify properties of a state transition system by first making abstraction of the system and then applying model checking on the abstract system. If the employed abstraction relation satisfies certain conditions that guarantee the correctness of the abstraction, verification results of the abstract system can be shifted to the original one. However, the co...

Knowledge base (KB) is an important component knowledge-based systems (KBS). Due to the fact that KB is often built in an incremental and piecemeal fashion, potential errors may be inadvertently brought into it. KB verification refers to the process of ascertaining the correctness of a KB, which is an integral part of the effort to guarantee the overall correctness of a KBS. KB verification pre...

Fault-tolerance is a crucial property in many systems. Thus, mechanical verification of algorithms associated with synthesis of faulttolerant programs is desirable to ensure their correctness. In this paper, we present the mechanized verification of algorithms that automate the addition of fault-tolerance to a given fault-intolerant program using the PVS theorem prover. By this verification, no...

The importance of correctness of systems is becoming more crucial as computers control more of our everyday activities. Various approaches have been advocated and used for the verification of such correctness, with one of the more promising ones being runtime verification. One important issue in runtime verification is the logic used to specify properties, since this influences both the overhea...

The correctness of a system according to a given specification is essential, especially for safety-critical applications. One such typical application domain is the automotive sector, where more and more safety-critical functions are performed by largely software-based systems. Verification techniques can guarantee correctness of the system. Although automotive systems are relatively small comp...

In this thesis we describe the formal verification of a fully IEEE compliant floating point unit (FPU). The hardware is verified on the gate-level against a formalization of the IEEE standard. The verification is performed using the theorem proving system PVS. The FPU supports both single and double precision floating point numbers, normal and denormal numbers, all four IEEE rounding modes, and...

Certifying critical systems requires very precise specifications and ability to verify each development step. However, proofreading and test based verification are usually not exhaustive and as systems get more complex, their coverage is less and less adequate. Use of models allows early verification, validation and automated building of “correct by construction” systems. Our work targets forma...

Formal verification of complex algorithms is challenging. Verifying their implementations goes beyond the state of the art of current verification tools and proving their correctness usually involves non-trivial mathematical theorems. Certifying algorithms compute in addition to each output a witness certifying that the output is correct. A checker for such a witness is usually much simpler tha...

Reactive systems have an ongoing interaction with their environment, accepting requests and producing responses. Correct and reliable construction of reactive systems is particularly important and challenging. So, using a formal method to establish mathematical proof of correctness of such systems is necessary. A formal method consists of three major components: a model for describing the behav...

Formal verification of asynchronous circuits is known to be challenging due to highly non-deterministic behavior exhibited in these systems. One of the main challenges is that it is very difficult to come up with a systematic approach to establishing invariance properties, which are crucial in proving the correctness of circuit behavior. Nondeterminism also results in asynchronous circuits havi...