Abstract: A functional model of silicon carbide (SiC) JFET was developed to study its performance. Based on this model, the gate resistor in the gate drive circuit of SiC JFET is optimised with comprehensive consideration of gate current impact, miller effect, switching speed and voltage spikes. The switch on oscillation caused by parasitic inductance is analysed and methods are proposed to mit...

Shorts and opens are the most common types of catastrophic defects in today's CMOS ICs. In this paper we show that an open in the interconnect wiring of a digital CMOS circuit, which permanently disconnects inputs of logic gates from their driver, can cause oscillation or sequential behavior. We present supporting experimental data collected by creating an interconnect open in a manufactured ch...

At frequencies around ωx, the inductor can be equivalently modeled by the parallel circuit on the right where the conductance Gp relates to the resistance Rs as The relationship between the maximum oscillation frequency and the process parameter fT for two useful classes of oscillators is developed. Results show that the oscillation frequency of a class of LC-tank oscillators can be substantial...

This paper describes the relationship among damped oscillation, frequency-impedance characteristics (f-z characteristics) and conducted EMI occurring in induction cooking. The R-L-C equivalent circuit of induction pot is proposed. The relationship among ring, f-z characteristic and conducted EMI are verified by experiment. Finally, the reduction technique for damped oscillation is proposed usin...

The single-electron circuit in the nature of discrete dynamical systems because it changes its state discontinuously because of electron tunneling. To confirm this, we designed a sample circuit consisting of two single-electron oscillators coupled with each other through a coupling capacitor. The oscillators produce relaxation oscillation and interact with each other to generate synchronization...

In this study, wave propagation phenomena of phase states are observed at van der Pol oscillators coupled by inductors as a ladder. For the case of 17 oscillators, interesting wave propagation phenomena of phase states are found. By using the relationship between phase states and oscillation frequencies, the mechanisms of the propagation and the reflection of wave are explained. Circuit experim...

This article aims to describe the fundamentals of analog and digital testing methods to analyze the difficulties of analog testing and to develop an approach to test the analog components in a mixed signal circuit environment. Oscillation based, built-in self-test methodology for testing analog components in mixed-signal circuits, in particular, is discussed. A major advantage of the OBIST meth...

Modern System-on-Chip (SoC) designs are increasingly mixed-signal Very Large Scale Integrated (VLSI) designs that require efficient design and testing methodologies to manage the design complexity and the time-to-market constraints. Also, in mixed-signal integrated circuits (ICs), testing analog cores is the most difficult task and it’s one of the major cost factors in the overall IC manufactur...

We systematically investigate the characteristics of an electrical oscillation observed in two-terminal vanadium dioxide VO2 devices. These oscillations are observed at room temperature in a simple electrical circuit without inductive components. The circuit is composed only of a dc voltage source, the VO2 device, and a standard resistor connected in series with the device. We explain why the o...

A low-cost and comprehensive built-in self-test (BIST) methodology for analog and mixed-signal circuits is described. We implement a time-division multiplexing (TDM) comparator to analyze the response of a circuit under test with minimum hardware overhead. The TDM comparator scheme is an effective signature analyzer for on-chip analog response compaction and pass/fail decision. We apply this sc...