We propose and investigate experimentally a tunable and stable fiber laser with single-longitudinal-mode (SLM) and power-equalized output based on a two-stage erbium amplifier and a saturable-absorber filter. Two-stage amplifier consists of an erbium-doped waveguide amplifier (EDWA) and erbium-doped fiber amplifier (EDFA) to generate a flatter amplified spontaneous emission (ASE) source for con...

A new design technique employing CMOS Current Feedback Operational Amplifier (CFOA) is presented. This design approach applies CFA OTA as input stage cascaded with class AB cross-coupled buffer stage. The performance parameters of CMOS CFOA such as bandwidth, slew rate, settling time are extensively improved compared with conventional CFOA. These parameters are very important in high frequency ...

A B S T R A C T A high speed bandpass continuous-time biquad filter is implemented in a 0.8l_tm BiCMOS technology. It demonstrates a wide range of frequency tunability from 25MHz-1lOMHz. The filter intermodulation distortion stays below-52dB at 5OMHz with 1OOmVP input differential signals. The power consumption (& = 5OMHz) is 90mW with a single 5V supply. 1. INTRODUCTION The transconductor-capa...

A laser-diode pumped Q-switched single-frequency Nd:YAG MOPA operating at 100 Hz was used to generate tunable mid-infrared radiation between 6.27 µm and 8.12 µm by employing a cascaded parametric arrangement consisting of degenerate parametric master-oscillator power amplifier using a large aperture periodically-poled Rb:KTiOPO4 which in turn pumped a ZnGeP2 (ZGP) nonplanar RISTRA OPO. The nonc...

A single-stage 24 GHz triple stacked power amplifier using 0.13 μm CMOS process is demonstrated. To Compare with parallel current combining method, series voltage combining method using a stacked amplifier architecture can realize a large output voltage swing from the top transistor without exceeding the transistor breakdown voltage limitations. However, at high frequencies, parasitic capacitan...

This paper shows that multirate processing in a cascaded discrete-time modulator allows to reduce the power consumption by up to 35%. Multirate processing is possible in a discrete-time modulator by its adaptibility with the sampling frequency. The power reduction can be achieved by relaxing the sampling speed of the first stage and increasing it appropriately in the second stage. Furthermore, ...