Low-power wireless system design requires optimization at all levels of the design abstraction. Sub-1V operation is the key to lowpower design and requires modification of the process technology (e.g., multiple threshold devices, variable threshold devices using bulk biasing or dual-gate SO1 technology, etc.), circuit optimization, and architecture optimization. The CAD tool requirements for th...

Due to rapid advances in VLSI design technology during the last decade, the complexity and size of circuits have been rapidly increasing, placing a demand on industry for faster and more efficient CAD tools. Physical design is a process of converting the physical description into geometric description. Physical design process is subdivided into four problems: 1.Partitioning, 2. Floor planning 3...

A radical reappraisal of the 3-D Interactive raster graphics pipeline has resulted In an experimental architecture for a workstation which is currently being evaluated at the CW!. The principal features of this architecture are that It: concentrates exclusively on real-time interactive 3-D graphics (initially for CAD). uses object space rather than Image space methods where possible. avoids usi...

My research areas include VLSI CAD, FPGA testing and trust design, fault-tolerant computing and parallel processing. We have also made a recent foray into optimization. Our work has received one best paper and one most-influential paper awards, one featured speaker recognition, and one best paper nomination, all at premier conferences. My research has been or is funded by NSF, DARPA and AFOSR, ...

At this time, the functional design of the x-chip is being completed. Detailed design is scheduled to begin in the spring, with fabrication of the first chip scheduled for the end of summer. We plan to use MOSIS, a silicon brokerage service funded by DARPA and NSF, to fabricate the chips. Our CAD tools consist of the VLSI design tools from the University of Washington, augmented by other public...

Graduate students can usually be classi ed in two categories: research engineers and practicing engineers. The microelectronic systems education of these two groups of students have di erent objectives. This paper describes a one semester course developed to meet the objectives for both groups of students. The course lectures cover custom and semicustom CMOS VLSI circuit design, and the laborat...

Binary Optics: Binary (diffractive) optics uses computer-aided design (CAD) tools and verylarge-scale-integration (VLSI) electronic circuit manufacturing technology to create novel optical devices and to provide design freedom and new materials choices for optical elements. When combined with conventional (refractive) optical lens systems, binary optical systems cannot only provide athermalizat...

The objectives in this paper are twofold: design an approach for the netlist partitioning problem using the cooperative multilevel search paradigm introduced by Toulouse et al. and study the effectiveness of this paradigm for solving combinatorial optimization problems, in particular, those arising in the very large scale integration (VLSI) computer-aided design (CAD) area. The authors present ...

This paper present area efficient layout designs for 3.3GigaHertz (GHz) Phase Locked loop (PLL) with four multiple output. Effort has been taken to design Low Power Phase locked loop with multiple output, using VLSI technology. VLSI Technology includes process design, trends, chip fabrication, real circuit parameters, circuit design, electrical characteristics, configuration building blocks, sw...