Networks on chip (NoCs) are communication infrastructures that offer parallelism and scalability. In this paper we present high performance dynamically allocated multi-queue (DAMQ) buffer schemes for fault tolerance systems on chip applications that require an interconnection network. Two virtual channels shared the same buffer space. Fault tolerant mechanisms for interconnection networks are b...

We consider the issue of QoS (Quality of Service) in a network catering to isochronous VoIP (Voice over IP) sessions. Our simulation experiments strongly suggest that the single–path paradigm of implementing network–layer virtual circuits neither yields the best utilization of network resources (buffer space) nor is it able to provide the best end-to-end service in terms of loss rate and delay....

Design space exploration and performance evaluation are the most essential task in NoC design. In this paper, we proposed a design space exploration framework using analytical modeling. We have considered many-many mapping between cores and switches. A buffer allocation algorithm for wormhole routing based networks-on-chip is proposed for the design space exploration. When the total budget of t...

This paper presents a new approach to global clock distribution in which traditional tree-driven grids are augmented with onchip inductors to resonate the clock capacitance at the fundamental frequency of the clock node. Rather than being dissipated as heat, the energy of the fundamental resonates between electric and magnetic forms. The clock drivers must only provide the energy necessary to o...

Despite the fact that protection mechanisms like StackGuard, ASLR and NX are widespread, the development on new defense strategies against stack-based buffer overflows has not yet come to an end. In this paper, we present a compiler-level protection called SCADS: Separated Controland Data-Stacks. In our approach, we protect return addresses and saved frame pointers on a separate stack, called t...

Despite the fact that protection mechanisms like StackGuard, ASLR and NX are widespread, the development on new defense strategies against stack-based buffer overflows has not yet come to an end. In this article, we present a novel compiler-level protection called SCADS: Separated Control and Data Stacks that protects return addresses and saved frame pointers on a separate stack, called the con...

In this paper a special kind of buffer management policy is studied where the packet are preempted even when sufficient space is available in the buffer for incoming packets. This is done to congestion for future incoming packets to improve QoS for certain type of packets. This type of study has been done in past for ATM type of scenario. We extend the same for heterogeneous traffic where data ...

In this paper, we comparatively evaluate two photonic packet switch architectures with WDM-FDL buffers for synchronized variable length packets. The first one is an output buffer type switch, which stores packets in the FDL buffer attached to each output port. Another is a shared buffer type switch, which stores packets in the shared FDL buffer. The performance of a switch is greatly influenced...

In t.his paper we study the problem of optimal Ijuffer space priority control in an ATM network node. 'l'lie bulfer of a transmission link is shared among the cclls of several traffic classes waiting for transmission t.lirough t,he link. When the number of cells to be st,ored in the buffer exceeds the available buffer space, ccr ia i i i cells have to be dropped. Different traffic classes have ...

This paper presents present three novel buffer schemes for system on chip applications that have an interconnection network. The proposed schemes are based on a DAMQ self-compacting buffer to provide larger available buffer space per channel for incoming flits. The proposed schemes outperform existing approaches, and optimize buffer management by providing better throughput when the network has...