نتایج جستجو برای: active high decoder

تعداد نتایج: 2416736  

Journal: :IPSJ Transactions on System LSI Design Methodology 2010

2010

Wyner-Ziv (WZ) encoder is a low -complexity encoder and can be made to achieve compression comparable to traditional high complexity encoders but at the expense of a high-complexity decoder. The high complexity of the decoder is mainly attributed to the generation of side information which involves motion estimation. In this paper sub-pixel motion estimation and intra-prediction based on H.264 ...

Journal: :Nature 1966

Journal: :IEEE Trans. Communications 1993
Shuji Kubota Shuzo Kato Tsunehachi Ishitani

This paper presents an advanced, high-speed, and universal-coding-rate Viterbi decoder VLSI implementation. Two novel circuit design schemes have been proposed: “scarce state transition (SST)” and “direct high-coding-rate convolutional code generation and variable-rate Viterbi decoding.” SST makes it possible to omit the final decision circuit and to reduce the required path memory length witho...

2005
HWANG-CHERNG CHOW

In this paper, a new MBE (modified Booth encoding) recoder, and a new MBE decoder are proposed in CMOS transistor level to improve the performance of traditional multipliers. The proposed pipelined Booth multiplier can reduce the delay time of the critical path by levelizing the complex gate in the MBE decoder. As a result, MBE decoder is no more the speed bottleneck of a pipelined booth multip...

2010
Camille LEROUX Christophe JEGO Patrick ADDE Michel JEZEQUEL

—In this paper, we demonstrate the higher hardware ef ciency of Reed-Solomon (RS) parallel turbo decoding compared with BCH parallel turbo decoding. Based on an innovative architecture, this is the rst implementation of fully parallel RS turbo decoder. A performance analysis is performed showing that RS Block Turbo Codes (RS-BTC) have decoding performance equivalent to Bose Ray-Chaudhuri Hocque...

2007
MANJULA SUTAGUNDAR

This paper presents implementation of a soft decision Viterbi decoder suitable for convolution codes with short constraint lengths. The decoder is based on a property of Viterbi algorithm that states “if the survivor paths from all possible states at time n are traced back then with high probability all the paths merge at time n-L where L is the survivor path length”. Pipeline structures are in...

2015
Arshi Sheikh Mohd Abdullah Pritesh Tiwari Krishna Murthy Anil Kumar A. K. Jaiswal Rajeev Paulus Mayur Kumar Shweta N. Shah Alisha Khan Kundan Kumar Chinmayee Das

The errors caused in the wireless communication channel are very important to identify and rectify. Viterbi Decoder is very commonly implemented technique among the various error detection and correction (EDAC) techniques. A high data-rate convolutional code suffers from decrease in the performance of bit-error-rate due to inherent drifting error between the estimated and the accurate path matr...

  This paper proposes a new structure for digital address decoders based on flip-flops with application in wake-up signal generators of wireless networks nodes. Such nodes equipped with this device can be utilized in Internet of Things applications where the nodes are dependent on environment energy harvesting to survive for a long time. Different parts in these wireless nodes should have an e...

2008
Zhimin Yang Shiju Li Hao Feng

This paper presents a cross layer iterative decoder for irregular Low-Density Parity-Check (LDPC) coded system by using Cyclic Redundancy Check (CRC) codes. The key idea of the decoder is to use the correctly decoded frame to help correcting the left erroneous ones. To accomplish this, the decoder digs the useful information between layers by using the cross layer design method and an iterative...

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