This paper describes high-voltage CMOS buffer architecture that uses low-voltage transistors. The voltage capability of presented architecture is nearly three times larger than the voltage capability of used MOSFET's. This buffer topology could be used to provide 3.3V compatibility of 1.2V and 1.5V digital ICs implemented in standard CMOS technology. A 7V circuit-prototype was fabricated in 0.2...

Different cascode circuits are investigated with regard to their suitability for low-voltage and low-current circuits. A generalized circuit representation is introduced and different cascode circuits are discussed with respect to their small-signal parameters as well as their associated dynamic output ranges. The output voltage ranges for saturation operation of the different cascode circuits ...

The demonstration of a 75-305-GHz power amplifier (PA) monolithic microwave integrated circuit (MMIC) is presented in this letter. PA based on an eight-cell traveling-wave unit (UA). Each cell contains RF cascode with two two-finger transistors gate width 20 ?m each. In the output stage, balanced configuration combines UAs Lange couplers. front, third UA used as driver amplifier. MMIC fabricate...

A fully differential Miller op-amp with a composite input stage using resistive local common-mode feedback and regulated cascode transistors is presented here. High gain pseudo-differential auxiliary amplifiers are used to implement the in order boost output impedance of open-loop op-amp. Both stages operate class AB mode. The proposed has been simulated 130nm commercial CMOS process technology...

After explaining the basic operation of a SiC JFET plus silicon MOSFET cascode circuit, the dynamics of cascode switching will be discussed and the use of a QRR tester to evaluate the reverse-recovery characteristics of a cascode circuit will be explained. A comparison of the cascode’s reverse recovery with that of a SiC MOSFET reveals that the JFET cascode actually performs better than the SiC...

We certify that this work has passed the scholastic standards requested by the Information and Communications University as a thesis for the Abstract The commercialization of Ultra-WideBand (UWB) ranging from 3.1-10.6 GHz by Federal Communication Commission (FCC) has recently emerged as a promising technology for short-range wireless data communications. The applications of wireless data commun...

In this paper we present a three-stage fully differential operational amplifier in 120nm digital CMOS. To reach high gain gain-boosted cascodes in the first stage are used. The gain-boost amplifiers are realized as two-stage amplifiers with self cascodes. A DC gain of 108dB and an unity-gain frequency of 1.06GHz are achieved at 1.2V supply. The operational amplifier is appropriate for supply vo...

Various cascode circuits are investigated with regard to their suitability for switched current copier applications. Generalized circuit representations are introduced and different cascode circuits are compared and discussed. A method called “reference voltage and current tracking” for dynamic output range improvement is proposed. An improved regulated cascode circuit with extended dynamic out...

A fully integrated low-noise amplifier (LNA) with 0.4V supply voltage and ultra-low power consumption at 1.5GHz by folded cascode structure is presented. The proposed LNA is designed in a TSMC 0.18 μm CMOS technology, in which the all transistors are biased in sub-threshold region. Through the use of the proposed circuit for the gain enhancement in this structure and using forward body bias tec...

This article presents a gate driver circuit with all-magnetic isolation for driving silicon carbide (SiC) power devices in three-level T-type bridge-leg. Gate circuitry SiC has to be tolerant of rapid common-mode voltage changes. With respect the resultant potentially problematic current paths, an arrangement transformers is proposed supplying drive signals and their local floating circuits. Th...