In this paper we present a hardware design technique which utilises runtime recon guration for a particular class of applications. For a multiplication circuit implemented within an FPGA, a speci c instance of multiplying by a constant provides a signi cant reduction of required logic when compared to the generic case when multiplying any two arbitrary values. The use of recon guration allows t...

We show an exponential separation between two well-studied models of algebraic computation, namely read-once oblivious algebraic branching programs (ROABPs) and multilinear depth three circuits. In particular we show the following: 1. There exists an explicit n-variate polynomial computable by linear sized multilinear depth three circuits (with only two product gates) such that every ROABP comp...

This chapter presents the design of the track-and-hold and multiplying digital-to-analog converter functional blocks. They are realized by Switched Capacitors (SC) circuits. Typical SC circuit stage consists of sampling capacitors and Metal Oxide Semiconductor (MOS) switches which turn on and off at the clock rate to store the input signal (charge) on the sampling capacitors and subsequently tr...

The performances of two full differential operational amplifiers (Op-Amps) telescopic and foldedcascode are evaluated to satisfy the stringent requirements on the amplifier to be used in a Multiplying Digitalto-Analog Converter (MDAC) stage of a pipelined ADC (Analog-to-Digital Converter). The paper shows the solutions found to reach high gain, wide bandwidth and short settling time without deg...

In this paper we present a hardware design technique which utilises run-time reconnguration for a particular class of applications. For a multiplication circuit implemented within an FPGA, a speciic instance of multiplying by a constant provides a signiicant reduction of required logic when compared to the generic case when multiplying any two arbitrary values. The use of reconnguration allows ...